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2024-12-24tests/tcg: Do not use inttypes.h in multiarch/system/memory.cIlya Leoshkevich1-5/+4
make check-tcg fails on Fedora with the following error message: alpha-linux-gnu-gcc [...] qemu/tests/tcg/multiarch/system/memory.c -o memory [...] qemu/tests/tcg/multiarch/system/memory.c:17:10: fatal error: inttypes.h: No such file or directory 17 | #include <inttypes.h> | ^~~~~~~~~~~~ compilation terminated. The reason is that Fedora has cross-compilers, but no cross-glibc headers. Fix by hardcoding the format specifiers and dropping the include. An alternative fix would be to introduce a configure check for inttypes.h. But this would make it impossible to use Fedora cross-compilers for softmmu tests, which used to work so far. Fixes: ecbcc9ead2f8 ("tests/tcg: add a system test to check memory instrumentation") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20241010085906.226249-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-12-17tests/tcg/aarch64: add system test for FEAT_XSManos Pitsidianakis1-0/+27
Add system test to make sure FEAT_XS is enabled for max cpu emulation and that QEMU doesn't crash when encountering an NXS instruction variant. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241211144440.2700268-7-peter.maydell@linaro.org [PMM: In ISAR field test, mask with 0xf, not 0xff; use < rather than an equality test to follow the standard ID register field check guidelines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-19Merge tag 'pull-9.2-rc-updates-181124-1' of https://gitlab.com/stsquad/qemu ↵Peter Maydell3-6/+6
into staging Misc fixes for 9.2 - fix remaining gdbstub test cases to exit cleanly - update MAINTAINERS with qemu-rust mailing list details - re-factor virtio-gpu and fix coverity warnings # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmc7aQwACgkQ+9DbCVqe # KkQufwf/XN5dcHxddhUHCLQUNA/5STiO5P10vHOGpknqwT/ZKADAbY8gQsoJovSp # qxczZPFpHlnGkf+AV3wrj2IcFUWlvlhgTw5njsMTOSSjK0jtI2MZrNn2v+6hmelg # y8ACB+LHkj34Ood9y5H6augCiKsMC7ad2mpXEMQgcZzpp4KlAutu8nbsYpYlAF40 # 1d2Wdtkrt++jPHQGgp0pPqAxq5WyvR3uSdidUFGfmpAqkCRs0ExosqEgj/ODzdHF # WrvLy9ISdCjZk+5XOxfadmz1vJ31QcZ6pcmkZRXJAJR4p7EST5BTfS10IBNIipgs # C25TuT+IH9+It0n/Sohf3NlxTnbTDw== # =TYAI # -----END PGP SIGNATURE----- # gpg: Signature made Mon 18 Nov 2024 16:19:24 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-9.2-rc-updates-181124-1' of https://gitlab.com/stsquad/qemu: hw/display: check frame buffer can hold blob hw/display: factor out the scanout blob to fb conversion MAINTAINERS: CC rust/ patches to qemu-rust list tests/tcg: Stop using exit() in the gdbstub testcases Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-18tests/tcg: Stop using exit() in the gdbstub testcasesIlya Leoshkevich3-6/+6
GDB 15 does not like exit() anymore: (gdb) python exit(0) Python Exception <class 'SystemExit'>: 0 Error occurred in Python: 0 Use the GDB's own exit command, like it's already done in a couple places, everywhere. This is the same fix as commit 93a3048dcf45 ("tests: Gently exit from GDB when tests complete"), but applied to more places. Acked-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20241022113939.19989-1-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2024-11-18tests/tcg/s390x: Add the floating-point multiply-and-add testIlya Leoshkevich4-145/+420
Add a test to prevent regressions. Share some useful pieces with the vfminmax test. Remove the duplicates from the floating point class values. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20241023000147.34035-3-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-16tests/tcg: Test that sigreturn() does not corrupt the signal maskIlya Leoshkevich2-0/+54
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20241108145237.37377-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05tests/tcg: Add SIGRTMIN/SIGRTMAX testIlya Leoshkevich2-2/+76
Test the lowest and the highest real-time signals. This requires configuring the real-time signal mapping, and therefore some knowledge about the host. To this end, pass the emulator path in the QEMU environment variable to all tests (this should not disturb the existing ones), and assume that all hosts have signals 36-39 available. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20241029232211.206766-3-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05tests/tcg: Replace -mpower8-vector with -mcpu=power8Ilya Leoshkevich1-5/+5
[1] deprecated -mpower8-vector, resulting in: powerpc64-linux-gnu-gcc: warning: switch '-mpower8-vector' is no longer supported qemu/tests/tcg/ppc64/vsx_f2i_nan.c:4:15: error: expected ';' before 'float' 4 | typedef vector float vsx_float32_vec_t; | ^~~~~~ Use -mcpu=power8 instead. In order to properly verify that this works, one needs a big-endian (the minimum supported CPU for 64-bit little-endian is power8 anyway) GCC configured with --enable-checking (see GCC commit e154242724b0 ("[RS6000] Don't pass -many to the assembler"). [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109987 Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241023131250.48510-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-25Merge tag 'pull-maintainer-oct-misc-241024-1' of ↵Peter Maydell6-3/+144
https://gitlab.com/stsquad/qemu into staging testing, gdbstub and plugin updates - update MAINTAINERS with pointers to foo/next - add NOFETCH to help test custom docker builds - update microblaze toolchain with atomic fixes - update tsan build and documentation - don't restrict build-environment by arch unless needed - add cross-modifying code test - add tracepoints for cpu_step_atomic fallbacks - fix defaults for loongarch cross build - make check-[dco|patch] a little more verbose - fix gdbstub bug preventing aarch64_be-linux-user starting - add basic test for aarch64_be - clean up some gdbstub test scripts - fix qemu_plugin_reset # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmcaDeQACgkQ+9DbCVqe # KkRTlQgAlFaP1Nxa8y6pRZSL0WY9J3Znf5e2GDnVN3nJbfx1wZg7oZ4/dWieDF/Y # /9jLfMi8nDJ51tzH24PSASbHQ1xnblhuUfhRMwqAFhSwsZUb0VzdeGdq+FIyXQ5w # Cy2Ubz7g81qP/x9JRCCUGFfXaM1LSizsY1lNioRsDd533WJLkvxWucmpSN3XhxHJ # rEa3xI/qAcUah4G3yww47L+DmlKnJQcsihShRBC6Am2tWqxbz+1kBUaVfaVVo1if # IPN+bBk4eI1EHdRRyWJSsq3nELzqW4FJ3+9V0ifsOFW2KGsnkhbl0qUxqDmW5aBb # P9flEdpTfSiCbqp+IKG9vxJKuf/BGw== # =5Wui # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Oct 2024 10:05:40 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-maintainer-oct-misc-241024-1' of https://gitlab.com/stsquad/qemu: plugins: fix qemu_plugin_reset MAINTAINERS: mention my plugins/next tree testing: Enhance gdb probe script tests/tcg/aarch64: Use raw strings for regexes in test-mte.py tests/tcg: enable basic testing for aarch64_be-linux-user config/targets: update aarch64_be-linux-user gdb XML list MAINTAINERS: mention my gdbstub/next tree gitlab: make check-[dco|patch] a little more verbose dockerfiles: fix default targets for debian-loongarch-cross accel/tcg: add tracepoints for cpu_loop_exit_atomic tests/tcg/x86_64: Add cross-modifying code test scripts/ci: remove architecture checks for build-environment updates docs/devel: update tsan build documentation meson: hide tsan related warnings MAINTAINERS: mention my testing/next tree tests/docker: add NOFETCH env variable for testing tests/docker: Fix microblaze atomics Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-10-24tests/tcg/aarch64: Use raw strings for regexes in test-mte.pyGustavo Romero1-2/+2
Use Python's raw string notation instead of string literals for regex so it's not necessary to double backslashes when regex special forms are used. Raw notation is preferred for regex and easier to read. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20241015140806.385449-1-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-15-alex.bennee@linaro.org>
2024-10-24tests/tcg: enable basic testing for aarch64_be-linux-userAlex Bennée3-1/+58
We didn't notice breakage of aarch64_be because we don't have any TCG tests for it. However while the existing aarch64 compiler can target big-endian builds no one packages a BE libc. Instead we bang some rocks together to do the most basic of hello world with a nostdlib syscall test. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-14-alex.bennee@linaro.org>
2024-10-24tests/tcg/x86_64: Add cross-modifying code testIlya Leoshkevich2-0/+84
commit f025692c992c ("accel/tcg: Clear PAGE_WRITE before translation") fixed cross-modifying code handling, but did not add a test. The changed code was further improved recently [1], and I was not sure whether these modifications were safe (spoiler: they were fine). Add a test to make sure there are no regressions. [1] https://lists.gnu.org/archive/html/qemu-devel/2022-09/msg00034.html Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241001150617.9977-1-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-8-alex.bennee@linaro.org>
2024-10-23pc-bios/s390-ccw: Use the libc from SLOF and remove sclp printsJared Rossi2-1/+4
We are already using the libc from SLOF for the s390-netboot.img, and this libc implementation is way more complete and accurate than the simple implementation that we currently use for the s390-ccw.img binary. Since we are now always assuming that the SLOF submodule is available when building the s390-ccw bios (see commit bf6903f6944f), we can drop the simple implementation and use the SLOF libc for the s390-ccw.img binary, too. Additionally replace sclp_print calls with puts/printf now that it is available. Co-authored by: Thomas Huth <thuth@redhat.com> Signed-off-by: Jared Rossi <jrossi@linux.ibm.com> Message-ID: <20241020012953.1380075-3-jrossi@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-10-13tests/tcg: Run test-proc-mappings.py on i386Ilya Leoshkevich1-11/+6
Now that orig_ax is exposed and GDB is happy, don't skip test-proc-mappings.py on i386. In fact, it's broken only on m68k now, so skip only this architecture. Acked-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240912093012.402366-6-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-03tests/tcg/plugins: Remove remainder of the cris targetThomas Huth1-1/+0
The cris target has recently been removed (see commit 44e4075bf4 - "target/cris: Remove the deprecated CRIS target"), but apparently this line has been forgotten. So clean it up now. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-10-02tests/tcg/s390x: Test modifying an EXECUTE targetIlya Leoshkevich2-0/+58
QEMU correctly implements the tracking of EXECUTE target modifications by storing the instruction text in env->ex_value and tb->cs_base, the latter of which is used for lookups. Still, EXECUTE is a tricky corner of the s390x emulation, which can benefit from having a regression test. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20241001145634.9786-1-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-09-25Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingPeter Maydell1-1/+1
trivial patches for 2024-09-20 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmbtJJUACgkQgqpKJDse # lHjduhAAoZSS5+n2f8C4w4oboH9e5JSa6UAuVqGgju10SHm+VNgg2rQeeTD+J8uU # vXL5lZKIb/jPNfHmsS5Q8CsuzV0M+A0wCcZJHaK5clVc1pZWMqwPPT4g4BUyjURi # ptvQXWtTM049DDWZZXo+AHPQtko7f58EThn9fLBo/1yJe2UlBwhZwahKm3h66kkb # aO9TI9UVt06DmXAvPBK9IfgFjYzkUJRQnLLmJDXiLx6YbuixX+J2PjKav5NtacRE # KUArkLNfB00ouFYDOoLAnn/l+VWKIYkREeKbfQIj95BoejqAKsDztq35+oiRQbCZ # CznKgXMIBNJCCYvKJXAoZeslE3n7Q0dlJ3RppClBjzHOiZTM46yeTofzzFot7SCN # ERuV1WcTo53ooDvpvlP9S3d3P2i62eL5JPXgpN57Zuy7PTYQkcDq5wMTWlvm/OBy # /hzcmIm1KHrprjf/+aNRdeCT27Rf1YD8EiTaabgtTZA4r00DrTpopAJs8ncKfbrA # nxa8e7lNorx/PcBSJJA5iB1Q05y19eoLJcrCFMieFuG2s/oubm+bXrAuNjsSuJbS # Lq50dIO6UIJSrV59w0CTBDrOuVXUv8/jbqRCUBMEzbXfz8mW9e8PXL+evVa8rKfk # 6EMmDqC0/CmRrHT5uKkqTLtxcYGagdww3WIUB88UgARxydRPhu8= # =++OB # -----END PGP SIGNATURE----- # gpg: Signature made Fri 20 Sep 2024 08:30:29 BST # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [full] # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (22 commits) license: Update deprecated SPDX tag GPL-2.0 to GPL-2.0-only license: Update deprecated SPDX tag GPL-2.0+ to GPL-2.0-or-later license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later license: Simplify GPL-2.0-or-later license descriptions tests/functional: Correct typo in test_netdev_ethtool.py SPDX tag tests/bench: Rename test_akcipher_keys.inc -> test_akcipher_keys.c.inc target/hexagon: Rename macros.inc -> macros.h.inc tests/functional: Put the or1k_sim test into the slow category tests/qemu-iotests/testenv: Use the "r2d" machine for sh4/sh4eb tests/qemu-iotests/testenv: Use the "virt" machine for or1k util/cutils: Remove unused qemu_get_exec_dir hw/sysbus: Remove unused sysbus_mmio_unmap envlist: Remove unused envlist_parse hw/display: Fix mirrored output in dm163 hw/virtio/Kconfig: Include vhost-user-scmi only on arm targets tests/unit: Really build pbkdf test on macOS hw/loongarch/virt: Add description for virt machine type hw/mips/jazz: fix typo in in-built NIC alias ppc: fix incorrect spelling of PowerMac linux-user/syscall.c: eliminate other explicit LFS usages ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-09-20license: Update deprecated SPDX tag GPL-2.0 to GPL-2.0-onlyPhilippe Mathieu-Daudé1-1/+1
The 'GPL-2.0' license identifier has been deprecated since license list version 3.0 [1] and replaced by the 'GPL-2.0-only' tag [2]. [1] https://spdx.org/licenses/GPL-2.0.html [2] https://spdx.org/licenses/GPL-2.0-only.html Mechanical patch running: $ sed -i -e s/GPL-2.0/GPL-2.0-only/ \ $(git grep -l 'SPDX-License-Identifier: GPL-2.0[ $]' \ | egrep -v '^linux-headers|^include/standard-headers') Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-09-19plugins: add option to dump write argument to syscall pluginRowan Hart1-0/+117
Signed-off-by: Rowan Hart <rowanbhart@gmail.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240827215329.248434-3-rowanbhart@gmail.com> [AJB: tweak fmt string for vaddr] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-18-alex.bennee@linaro.org>
2024-09-19tests/tcg: add a system test to check memory instrumentationAlex Bennée6-19/+377
At first I thought I could compile the user-mode test for system mode however we already have a fairly comprehensive test case for system mode in "memory" so lets use that. As tracking every access will quickly build up with "print-access" we add a new mode to track groups of reads and writes to regions. Because the test_data is 16k aligned we can be sure all accesses to it are ones we can count. First we extend the test to report where the test_data region is. Then we expand the pdot() function to track the total number of reads and writes to the region. We have to add some addition pdot() calls to take into account multiple reads/writes in the test loops. Finally we add a python script to integrate the data from the plugin and the output of the test and validate they both agree on the total counts. As some boot codes clear the bss we also add a flag to add a regions worth of writes to the expected total. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240916085400.1046925-14-alex.bennee@linaro.org>
2024-09-19tests/tcg: ensure s390x-softmmu output redirectedAlex Bennée1-1/+2
The multiarch system tests output serial data which should be redirected to the "output" chardev rather than echoed to the console. Comment the use of EXTFLAGS variable while we are at it. Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-13-alex.bennee@linaro.org>
2024-09-19tests/tcg: only read/write 64 bit words on 64 bit systemsAlex Bennée1-7/+19
While the compilers will generally happily synthesise a 64 bit value for you on 32 bit systems it doesn't exercise anything on QEMU. It also makes it hard to accurately compare the accesses to test_data when instrumenting. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-12-alex.bennee@linaro.org>
2024-09-19tests/tcg: clean up output of memory system testAlex Bennée1-18/+29
This is useful information when debugging memory issues so lets improve by: - include the ptr address for u8 fills (like the others) - indicate the number of operations for reads and writes - explicitly note when we are flushing - move the fill printf to after the reset Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-11-alex.bennee@linaro.org>
2024-09-19tests/tcg/multiarch: add test for plugin memory accessPierrick Bouvier5-0/+232
Add an explicit test to check expected memory values are read/written. 8,16,32 load/store are tested for all arch. 64,128 load/store are tested for aarch64/x64. atomic operations (8,16,32,64) are tested for x64 only. By default, atomic accesses are non atomic if a single cpu is running, so we force creation of a second one by creating a new thread first. load/store helpers code path can't be triggered easily in user mode (no softmmu), so we can't test it here. Output of test-plugin-mem-access.c is the list of expected patterns in plugin output. By reading stdout, we can compare to plugins output and have a multiarch test. Can be run with: make -C build/tests/tcg/$ARCH-linux-user run-plugin-test-plugin-mem-access-with-libmem.so Tested-by: Xingtao Yao <yaoxt.fnst@fujitsu.com> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240910172033.1427812-7-pierrick.bouvier@linaro.org> Message-Id: <20240916085400.1046925-10-alex.bennee@linaro.org>
2024-09-19tests/tcg/plugins/mem: add option to print memory accessesPierrick Bouvier1-1/+68
By using "print-accesses=true" option, mem plugin will now print every value accessed, with associated size, type (store vs load), symbol, instruction address and phys/virt address accessed. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Xingtao Yao <yaoxt.fnst@fujitsu.com> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240724194708.1843704-6-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-9-alex.bennee@linaro.org>
2024-09-19tests/tcg: allow to check output of pluginsPierrick Bouvier1-0/+9
A specific plugin test can now read and check a plugin output, to ensure it contains expected values. Tested-by: Xingtao Yao <yaoxt.fnst@fujitsu.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240724194708.1843704-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-8-alex.bennee@linaro.org>
2024-09-19tests/tcg: add mechanism to run specific tests with pluginsPierrick Bouvier1-1/+2
Only multiarch tests are run with plugins, and we want to be able to run per-arch test with plugins too. Tested-by: Xingtao Yao <yaoxt.fnst@fujitsu.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240724194708.1843704-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240916085400.1046925-7-alex.bennee@linaro.org>
2024-09-13tests/tcg: Remove CRIS bare test filesPhilippe Mathieu-Daudé73-5616/+0
We are going to remove the CRIS target. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-3-philmd@linaro.org>
2024-09-13tests/tcg: Remove CRIS libc test filesPhilippe Mathieu-Daudé32-1505/+0
We never compiled / ran these tests. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-ID: <20240904143603.52934-2-philmd@linaro.org>
2024-09-10tests/tcg/aarch64: Extend MTE gdbstub tests to system modeGustavo Romero6-28/+224
Extend MTE gdbstub tests to also run in system mode (share tests between user mode and system mode). The tests will only run if a version of GDB that supports MTE on baremetal is available in the test environment and if available compiler supports the 'memtag' flag (-march=armv8.5-a+memtag). For the tests running in system mode, a page that supports MTE ops. is necessary. Therefore, an MTE-enabled page is made available (mapped) in the third 2 MB chunk of the second 1 GB space in the flat mapping set in boot.S. A new binary, mte.S, is also introduced for the tests. It links against boot.S and is executed by QEMU in system mode. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240906143316.657436-6-gustavo.romero@linaro.org> [AJB: fix stray _] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240910173900.4154726-11-alex.bennee@linaro.org>
2024-09-10tests/tcg/aarch64: Improve linker script organizationGustavo Romero1-12/+12
Improve kernel.ld linker script organization by using MEMORY command. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Message-Id: <20240906143316.657436-5-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240910173900.4154726-10-alex.bennee@linaro.org>
2024-08-21target/i386: Fix carry flag for BLSIRichard Henderson2-0/+25
BLSI has inverted semantics for C as compared to the other two BMI1 instructions, BLSMSK and BLSR. Introduce CC_OP_BLSI* for this purpose. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2175 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240801075845.573075-3-richard.henderson@linaro.org>
2024-08-07Hexagon: fix F2_conv_* instructions for negative zeroMatheus Tavares Bernardino1-1/+11
The implementation for these instructions handles -0 as an invalid float point value, whereas the Hexagon hardware considers it the same as +0 (which is valid). Let's fix that and add a regression test. Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <bcain@quicinc.com>
2024-07-30tests/tcg: move test plugins into tcg subdirAlex Bennée8-2/+1087
You cannot use plugins without TCG enabled so it doesn't make sense to have them separated off in the test directory structure. While we are at it rename the directory to plugins to reflect the plural nature of the directory and match up with contrib/plugins. Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240729144414.830369-10-alex.bennee@linaro.org>
2024-07-30tests/tcg: update READMEAlex Bennée1-9/+14
Update the document with details about the layout of tests. Remove the out of date cris comments. Refer to the developer guide for details about how to run the tests. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240729144414.830369-6-alex.bennee@linaro.org>
2024-07-30tests/tcg/loongarch64: Use --no-warn-rwx-segments to link system testsRichard Henderson1-1/+1
Recent debian cross-linker for loongarch issues ld: warning: hello has a LOAD segment with RWX permissions This is partially related to tests/tcg/loongarch64/system/kernel.ld, but is not fixed by explicitly adding a single LOAD PHDR. Disable the warning, since it does not apply to kernel images. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240724010733.22129-3-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240729144414.830369-5-alex.bennee@linaro.org>
2024-07-30tests/tcg: Use --noexecstack with assembler filesRichard Henderson10-10/+10
Add the --noexecstack assembler command-line option to avoid: /usr/bin/ld: warning: boot.o: missing .note.GNU-stack section implies executable stack /usr/bin/ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker which is enabled by default with current debian cross toolchains. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240724010733.22129-2-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240729144414.830369-4-alex.bennee@linaro.org>
2024-07-26tests/tcg: Skip failing ppc64 multi-threaded testsNicholas Piggin1-0/+12
In Gitlab CI, some ppc64 multi-threaded tcg tests crash when run in the clang-user job with an assertion failure in glibc that seems to indicate corruption: signals: allocatestack.c:223: allocate_stack: Assertion `powerof2 (pagesize_m1 + 1)' failed. Disable these tests for now. Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-07-22tests/tcg/aarch64: Fix test-mte.pyRichard Henderson1-1/+1
Python 3.12 warns: TEST gdbstub MTE support on aarch64 /home/rth/qemu/src/tests/tcg/aarch64/gdbstub/test-mte.py:21: SyntaxWarning: invalid escape sequence '\(' PATTERN_0 = "Memory tags for address 0x[0-9a-f]+ match \(0x[0-9a-f]+\)." Double up the \ to pass one through to the pattern. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240719004143.1319260-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2024-07-18tests/tcg/aarch64: Add test cases for SME FMOPA (widening)Daniyal Khan4-2/+185
Signed-off-by: Daniyal Khan <danikhan632@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20240717060149.204788-4-richard.henderson@linaro.org Message-Id: 172090222034.13953.16888708708822922098-1@git.sr.ht [rth: Split test from a larger patch, tidy assembly] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-07-05tests/tcg/aarch64: Add MTE gdbstub testsGustavo Romero3-1/+198
Add tests to exercise the MTE stubs. The tests will only run if a version of GDB that supports MTE is available in the test environment. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> [AJB: re-base and checkpatch fixes] Message-Id: <20240628050850.536447-12-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-41-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use vmrs/vmsr instead of mcr/mrcRichard Henderson1-3/+2
Clang 14 generates /home/rth/qemu/src/tests/tcg/arm/fcvt.c:431:9: error: invalid operand for instruction asm("mrc p10, 7, r1, cr1, cr0, 0\n\t" ^ <inline asm>:1:6: note: instantiated into assembly here mrc p10, 7, r1, cr1, cr0, 0 ^ /home/rth/qemu/src/tests/tcg/arm/fcvt.c:432:32: error: invalid operand for instruction "orr r1, r1, %[flags]\n\t" ^ <inline asm>:3:6: note: instantiated into assembly here mcr p10, 7, r1, cr1, cr0, 0 ^ This is perhaps a clang bug, but using the neon mnemonic is clearer. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-14-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-19-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use -march and -mfpu for fcvtRichard Henderson1-2/+2
Clang requires the architecture to be set properly in order to assemble the half-precision instructions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-13-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-18-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Manually register allocate half-precision numbersAkihiko Odaki1-1/+6
Clang does not allow specifying an integer as the value of a single precision register. Explicitly move value from a general register. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> [rth: Use one single inline asm block.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-12-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-17-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Use -fno-integrated-as for test-arm-iwmmxtRichard Henderson1-1/+7
Clang does not support IWMXT instructions. Fall back to the external assembler. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-11-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-16-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Drop -N from LDFLAGSRichard Henderson1-2/+2
This is redudant with a linker script, and is not supported by clang. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-10-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-15-alex.bennee@linaro.org>
2024-07-05tests/tcg/arm: Fix fcvt result messagesAkihiko Odaki3-605/+605
The test cases for "converting double-precision to single-precision" emits float but the result variable was typed as uint32_t and corrupted the printed values. Propertly type it as float. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Fixes: 8ec8a55e3fc9 ("tests/tcg/arm: add fcvt test cases for AArch32/64") Message-Id: <20240627-tcg-v2-1-1690a813348e@daynix.com> [rth: Update arm ref file as well] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-9-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-14-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Add -fno-integrated-as for smeRichard Henderson1-1/+2
The only use of SME is inline assembly. Both gcc and clang only support SME with very recent releases; by deferring detection to the assembler we get better test coverage. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-8-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-13-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Do not use x constraintAkihiko Odaki1-7/+7
clang version 18.1.6 does not support x constraint for AArch64. Use w instead. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-tcg-v2-5-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-7-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-12-alex.bennee@linaro.org>
2024-07-05tests/tcg/aarch64: Fix irg operand typeAkihiko Odaki1-1/+1
irg expects 64-bit integers. Passing a 32-bit integer results in compilation failure with clang version 18.1.6. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240627-tcg-v2-4-1690a813348e@daynix.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20240630190050.160642-6-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240705084047.857176-11-alex.bennee@linaro.org>
generated by cgit v1.1 at 2025-01-29 15:55:41 +0000