| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-02-14 | target/openrisc: Rename the cpu from or32 to or1k | Richard Henderson | 1 | -2/+2 |
| 2013-11-20 | target-openrisc: Correct carry flag check of l.addc and l.addic test cases | Sebastian Macke | 2 | -7/+11 |
| 2012-07-27 | target-or32: Add testcases | Jia Liu | 52 | -0/+2579 |
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index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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