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2025-11-25hw/nvme: Validate PMR memory sizePhilippe Mathieu-Daudé1-1/+1
Per the PCI spec 3.0, in section 6.2.5.1, "Address Maps": A 32-bit register can be implemented to support a single memory size that is a power of 2 from 16 bytes to 2 GB. Add a check in nvme_init_pmr(), returning an error if the PMR region size is too small; and update the QTest. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2025-11-21tests/migration-test: Use MEM_TYPE_MEMFD for memory_backendPeter Xu3-16/+5
The only two users of memory_backend as of now (cpr-exec, cpr-transfer) uses memfd as backend, now we fully support it. We can move memory_backend usage to mem_type and drop it. Reviewed-by: Juraj Marcin <jmarcin@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20251117223908.415965-5-peterx@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-11-21tests/migration-test: Add MEM_TYPE_SHMEMPeter Xu2-0/+16
Add memfd support for mem_type. Will be used to replace memory_backend. Reviewed-by: Juraj Marcin <jmarcin@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20251117223908.415965-4-peterx@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-11-21tests/migration-test: Merge shmem_opts into memory_backendPeter Xu1-15/+26
The two parameters are more or less duplicated in migrate_args(). They all describe the memory type. When one is used, the other is not. mem_type currently uses numa parameter to specify the memory backend, while memory_backend (the two users of such uses "-machine memory-backend=ID"). This patch merges the use of the two variables so that we always generate a memory object string and put it into "memory_backend" variable. Now we can drop shmem_opts parameter in the function. Meanwhile we always use a memory-backend-* no matter which mem type is used. This brings mem_type to be aligned with memory_backend usage, then we stick with this as this is flexible enough. This paves way that we merge mem_type and memory_backend in MigrateStart. Reviewed-by: Juraj Marcin <jmarcin@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20251117223908.415965-3-peterx@redhat.com [peterx: move MEM_TYPE_ANON case upper, per juraj] Signed-off-by: Peter Xu <peterx@redhat.com>
2025-11-21tests/migration-test: Introduce MemTypePeter Xu4-25/+68
Some migration tests need to be run with shmem, the rest by default use anonymous memory. Introduce MemType and replace use_shmem with such a enumeration. This prepares for a 3rd type of memory to be tested for migration. Careful readers may also already notice that MigrateStart has another field called memory_backend, which makes the whole "memory type" definition convoluted. That'll be merged into MemType soon in a follow up patch. When doing this, introduce some migrate_mem_type_*() helpers to do the work for each memory type. Reviewed-by: Juraj Marcin <jmarcin@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20251117223908.415965-2-peterx@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-11-14tests: Clean up includesPeter Maydell5-7/+0
This commit was created with scripts/clean-includes: ./scripts/clean-includes --git tests tests with one hand-edit to remove a now-empty #ifndef WIN32...#endif from tests/qtest/dbus-display-test.c . All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-id: 20251104160943.751997-10-peter.maydell@linaro.org
2025-11-04Merge tag 'staging-pull-request' of https://gitlab.com/peterx/qemu into stagingRichard Henderson1-1/+2
mem + migration pull for 10.2 - Fabiano's patch to fix snapshot crash by rejecting some caps - Marco's mapped-ram support on snapshot save/load - Steve's cpr maintainers entry update on retirement - Peter's coverity fixes - Chenyi's tdx fix on hugetlbfs regression - Peter's doc update on migrate resume flag - Peter's doc update on HMP set parameter for cpr-exec-command's char** parsing - Xiaoyao's guest-memfd fix for enabling shmem - Arun's fix on error_fatal regression for migration errors - Bin's fix on redundant error free for add block failures - Markus's cleanup around MigMode sets - Peter's two patches (out of loadvm threadify) to cleanup qio read peek process - Thomas's vmstate-static-checker update for possible deprecation of argparse use - Stefan's fix on windows deadlock by making unassigned MMIOs lockless # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCaQkZPBIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wZhTgEA8eCBMpM7PusNSdzzeIygKnIp2A8I70ca # eIJz3ZM+FiUBAPVDrIZ59EhZA6NPcJb8Ya9OY4lT63F4BxrvN+f+uG4N # =GUBi # -----END PGP SIGNATURE----- # gpg: Signature made Mon 03 Nov 2025 10:06:04 PM CET # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [unknown] # gpg: aka "Peter Xu <peterx@redhat.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'staging-pull-request' of https://gitlab.com/peterx/qemu: (36 commits) migration: Introduce POSTCOPY_DEVICE state migration: Make postcopy listen thread joinable migration: Respect exit-on-error when migration fails before resuming migration: Refactor all incoming cleanup info migration_incoming_destroy() migration: Introduce postcopy incoming setup and cleanup functions migration: Move postcopy_ram_listen_thread() to postcopy-ram.c migration: Do not try to start VM if disk activation fails migration: Flush migration channel after sending data of CMD_PACKAGED system/physmem: mark io_mem_unassigned lockless scripts/vmstate-static-checker: Fix deprecation warnings with latest argparse migration: vmsd errp handlers: return bool migration/vmstate: stop reporting error number for new _errp APIs tmp_emulator: improve and fix use of errp migration: vmstate_save_state_v(): fix error path migration: Properly wait on G_IO_IN when peeking messages io: Add qio_channel_wait_cond() helper migration: Put Error **errp parameter last migration: Use bitset of MigMode instead of variable arguments migration: Use unsigned instead of int for bit set of MigMode migration: Don't free the reason after calling migrate_add_blocker ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-11-03migration: Introduce POSTCOPY_DEVICE stateJuraj Marcin1-1/+2
Currently, when postcopy starts, the source VM starts switchover and sends a package containing the state of all non-postcopiable devices. When the destination loads this package, the switchover is complete and the destination VM starts. However, if the device state load fails or the destination side crashes, the source side is already in POSTCOPY_ACTIVE state and cannot be recovered, even when it has the most up-to-date machine state as the destination has not yet started. This patch introduces a new POSTCOPY_DEVICE state which is active while the destination machine is loading the device state, is not yet running, and the source side can be resumed in case of a migration failure. Return-path is required for this state to function, otherwise it will be skipped in favor of POSTCOPY_ACTIVE. To transition from POSTCOPY_DEVICE to POSTCOPY_ACTIVE, the source side uses a PONG message that is a response to a PING message processed just before the POSTCOPY_RUN command that starts the destination VM. Thus, this feature is effective even if the destination side does not yet support this new state. Signed-off-by: Juraj Marcin <jmarcin@redhat.com> Link: https://lore.kernel.org/r/20251103183301.3840862-9-jmarcin@redhat.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-11-03tests/qtest: Use exit-with-parent=on in qtest invocationsRichard W.M. Jones1-18/+4
Previously libqtest.c set PR_SET_PDEATHSIG (or the equivalent on FreeBSD) after forking the qemu subprocess. However we can get the same behaviour now by using the new -run-with exit-with-parent=on flag, on platforms that support it. Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2025-10-28qtest/am53c974-test: add additional test for cmdfifo overflowMark Cave-Ayland1-0/+40
Based upon the qtest reproducer posted to Gitlab issue #3082 at https://gitlab.com/qemu-project/qemu/-/issues/3082. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/r/20250925122846.527615-3-mark.cave-ayland@ilande.co.uk Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-10-28char: rename CharBackend->CharFrontendMarc-André Lureau1-8/+8
The actual backend is "Chardev", CharBackend is the frontend side of it (whatever talks to the backend), let's rename it for readability. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Link: https://lore.kernel.org/r/20251022074612.1258413-1-marcandre.lureau@redhat.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-10-22Merge tag 'pull-aspeed-20251022' of https://github.com/legoater/qemu into ↵Richard Henderson2-11/+98
staging aspeed queue: * Improve AST2700 co-processor models * Add vbootrom support to the ast2700fc multi-soc machine * Bump SDK version to v09.08 for the ast2700fc machine * Add 32 bits property for Aspeed GPIOs * Change ast2600-evb machine flash model to w25q512jv # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmj4ziMACgkQUaNDx8/7 # 7KFBBxAAy6LnSZDA9XncZsqVe1Vk254OLdwHAlOVgFD7pBDXp12qNBMJHyjw8QmV # sxxQXyyLARq4z+P58HMdEBvqdwtdyrieo7lv7QsR8zhYa/HSJtFQmnwRVFKA9lS5 # vAJ1TRi+B29ff24DC2CVBjnAgjrvE0lxmcXoLhObFdc2gU4Gzd+Oia91Nbgf35gA # NjfgIjMs1wKLO5SICCGDhW5bsdm2jYS+b5dP35VuvizfSihlUQMAbdnSXzLk2aT+ # iimik/aOAv/Tu3nV8G6RmQ/aWZhRNvuTGfBnK0AnSCWnQP6/9a9y+gp61mDzD8ht # 6hpLgEbBTwldjdrvaejg1iYQ04szYNiIYRTxT7ral4sIkCEi0tg4yzOcpHLfSnr1 # 1YT3Z1+Z2z7w3jAsd/SqMfQXksLQR3G/51tGkatxHMJ4IScdt/cASZWXK3RlhXH1 # YrQjiF5GuanM0oMcbyhgoq+sWNXP4EIWC3i6ER7H6MSRlfIjG+27kuxfnzJuZtDU # iAq4YD0tckoivhixvdv2OiT9IdYCDAeb/TMRy+5Xdf36D8NOhyoQUBgHeIhow6yJ # nCNPyCkM4HnpgkF0C+fyPBTqUP2AQ8NiTzBQA1bLorSjEN/9LMKvY9lwkEammp8/ # VnfeoIzNHIupeEcFCO+vgomHBKo/i4DeetrQYGDGkicvR7ztP8k= # =mivB # -----END PGP SIGNATURE----- # gpg: Signature made Wed 22 Oct 2025 07:29:23 AM CDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] * tag 'pull-aspeed-20251022' of https://github.com/legoater/qemu: hw/arm/aspeed: Remove ast2700fc self-aliasing hw/arm/aspeed: ast2600-evb: Use w25q512jv flash model tests/qtest: Add qtest for for ASPEED GPIO gpio-set property hw/gpio: Add property for ASPEED GPIO in 32 bits basis tests/functional/aarch64/ast2700fc: Add vbootrom test tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common function tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe test tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08 hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM hw/arm/ast27x0: Share single UART set across PSP, SSP, and TSP hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor hw/arm/aspeed_ast27x0-tsp: Add SDRAM region and fix naming and size to 512MB hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-22Merge tag 'uefi-20251022-pull-request' of https://gitlab.com/kraxel/qemu ↵Richard Henderson1-0/+2
into staging uefi: add firmware log monitor commands # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmj4uSUACgkQTLbY7tPo # cTiV7BAA2lRC9GkqIJ6E73Dmrbr9OPccN9YK+G4wccYa0BYlSJOW5FDxzSnLTPCQ # y9AbsRCLCy2ou8PrVpRQYO/U0Y2zxy07Wzu1YGcVNh7IxxOd3B47mNpzD18YCKnH # merlQrRdkMID4kVKNfXWvOoCgl7z/XnELQLz2fvMSNGlGD4PTAKKxm+46wxA7gTb # uKoOX7uclMVYAP4r/dHMOr4T9PAmbhRZCmr4FZpp0EA4+aVWv3GP0KK2VB0mI2Nr # aZpPo81iFjL+XQJh6A3El9Ez3JOJ+3qDt1+x9vLmTJxQyxUu6MvlCT8T+9v0ZuAi # V1Gh6qKHCzmfEZLsw1h8sZ2bh7GXsgzGuETPn7sY7cIt7R+qzQxYXs+wLDkC4zcT # YxRQu7SDS7ImoTvL6LQ9ksIZtC4Xml8dPNG7+r6so0AcKUVPPvaDO6Rd583fk/3X # ztZ6gymPjVLldMhty+D0A2XxGndIxtFK05ugDHrWQxqLP13aRXrBBbO239h619Ia # orNzSyHglUtpo6Q8fHb6JHGi3l4uE88kufQGAtltBAtdn3g+OxuinxgOzZTnfm7H # 5uasQM/ykdf8LLAqcTztti78I1Rnv8rusiVU+fq5qYsn5cPvixQqt2fCZBd9MXBk # CD2fVwHedNBpAUJnflkAMQ188tEWpf+Le1AgI7/n5MIe2rexJEg= # =h5Tv # -----END PGP SIGNATURE----- # gpg: Signature made Wed 22 Oct 2025 05:59:49 AM CDT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [unknown] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [unknown] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * tag 'uefi-20251022-pull-request' of https://gitlab.com/kraxel/qemu: hw/uefi/ovmf-log: add maxsize parameter hw/uefi: add 'info firmware-log' hmp monitor command. hw/uefi: add query-firmware-log monitor command Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-22hw/uefi: add query-firmware-log monitor commandGerd Hoffmann1-0/+2
Starting with the edk2-stable202508 tag OVMF (and ArmVirt too) have optional support for logging to a memory buffer. There is guest side support -- for example in linux kernels v6.17+ -- to read that buffer. But that might not helpful if your guest stops booting early enough that guest tooling can not be used yet. So host side support to read that log buffer is a useful thing to have. This patch implements the query-firmware-log qmp monitor command to read the firmware log. Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-ID: <20251017115006.2696991-2-kraxel@redhat.com>
2025-10-22tests/qtest/ds1338: Reuse from_bcd()Bernhard Beschow1-8/+4
from_bcd() is a public API function which can be unit-tested. Reuse it to avoid code duplication. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20251019210303.104718-11-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-10-22hw/arm/aspeed: ast2600-evb: Use w25q512jv flash modelCédric Le Goater1-2/+2
The ast2600-evb machine model is using the "mx66u51235f" flash model, which has issues with recent Linux kernels (6.15+) when reading SFDP data. Change the flash model to "w25q512jv", which is the model present on some ast2600a3 EVB board and is known to work correctly with recent kernels. Adjust the corresponding qtest to reflect the new JEDEC ID of the w25q512jv flash. Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Link: https://lore.kernel.org/qemu-devel/20251016212437.1046135-1-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-22tests/qtest: Add qtest for for ASPEED GPIO gpio-set propertyFelix Wu1-9/+96
- Added qtests to test gpio-set property for ASPEED. - Added function to get uint in qdict. Signed-off-by: Felix Wu <flwu@google.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20251015011830.1688468-3-lixiaoyan@google.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-10-06Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Richard Henderson3-4/+46
into staging virtio,pci,pc: features, fixes users can now control VM bit in smbios. vhost-user-device is now user-createable. intel_iommu now supports PRI virtio-net now supports GSO over UDP tunnel ghes now supports error injection amd iommu now supports dma remapping for vfio better error messages for virtio small fixes all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCgAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmji0s0PHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpuH4H/09h70IqAWZGHIWKGmmGGtdKOj3g54KuI0Ss # mGECEsHvvBexOy670Qy8jdgXfaW4UuNui8BiOnJnGsBX8Y0dy+/yZori3KhkXkaY # D57Ap9agkpHem7Vw0zgNsAF2bzDdlzTiQ6ns5oDnSq8yt82onCb5WGkWTGkPs/jL # Gf8Jv+Ddcpt5SU4/hHPYC8pUhl7z4xPOOyl0Qp1GG21Pxf5v4sGFcWuGGB7UEPSQ # MjZeoM0rSnLDtNg18sGwD5RPLQs13TbtgsVwijI79c3w3rcSpPNhGR5OWkdRCIYF # 8A0Nhq0Yfo0ogTht7yt1QNPf/ktJkuoBuGVirvpDaix2tCBECes= # =Zvq/ # -----END PGP SIGNATURE----- # gpg: Signature made Sun 05 Oct 2025 01:19:25 PM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [unknown] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (75 commits) virtio: improve virtqueue mapping error messages pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn() intel_iommu: Simplify caching mode check with VFIO device intel_iommu: Enable Enhanced Set Root Table Pointer Support (ESRTPS) vdpa-dev: add get_vhost() callback for vhost-vdpa device amd_iommu: HATDis/HATS=11 support intel-iommu: Move dma_translation to x86-iommu amd_iommu: Refactor amdvi_page_walk() to use common code for page walk amd_iommu: Do not assume passthrough translation when DTE[TV]=0 amd_iommu: Toggle address translation mode on devtab entry invalidation amd_iommu: Add dma-remap property to AMD vIOMMU device amd_iommu: Set all address spaces to use passthrough mode on reset amd_iommu: Toggle memory regions based on address translation mode amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL amd_iommu: Add replay callback amd_iommu: Unmap all address spaces under the AMD IOMMU on reset amd_iommu: Use iova_tree records to determine large page size on UNMAP amd_iommu: Sync shadow page tables on page invalidation amd_iommu: Add basic structure to support IOMMU notifier updates amd_iommu: Add a page walker to sync shadow page tables on invalidation ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-10-05tests/virtio-scsi: add a virtio_error() IOThread testStefan Hajnoczi1-0/+32
Now that virtio_error() calls should work in an IOThread, add a virtio-scsi IOThread test cases that triggers virtio_error(). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20250922220149.498967-6-stefanha@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-10-05tests/libqos: extract qvirtqueue_set_avail_idx()Stefan Hajnoczi2-4/+14
Setting the vring's avail.idx can be useful for low-level VIRTIO tests, especially for testing error scenarios with invalid vrings. Extract it into a new function so that the next commit can add a test that uses this new test API. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20250922220149.498967-5-stefanha@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-10-05tests/acpi: virt: update HEST and DSDT tablesMauro Carvalho Chehab1-11/+0
The following changes for DSDT affecting all files under tests/data/acpi/aarch64/virt/DSDT* : -"tests/data/acpi/aarch64/virt/DSDT", -"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt", -"tests/data/acpi/aarch64/virt/DSDT.acpipcihp", -"tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex", -"tests/data/acpi/aarch64/virt/DSDT.memhp", -"tests/data/acpi/aarch64/virt/DSDT.pxb", -"tests/data/acpi/aarch64/virt/DSDT.topology", -"tests/data/acpi/aarch64/virt/DSDT.viot", -"tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev", -"tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy", --- /tmp/DSDT_old.dsl 2025-09-05 15:03:18.964968499 +0200 +++ /tmp/DSDT.dsl 2025-09-05 15:03:18.966968470 +0200 @@ -1886,6 +1886,11 @@ { Notify (PWRB, 0x80) // Status Change } + + If (((Local0 & 0x20) == 0x20)) + { + Notify (GEDD, 0x80) // Status Change + } } } @@ -1894,6 +1899,12 @@ Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID } + + Device (GEDD) + { + Name (_HID, "PNP0C33" /* Error Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + } } Scope (\_SB.PCI0) Additionally, HEST changes: -"tests/data/acpi/aarch64/virt/HEST", --- /tmp/HEST_old.dsl 2025-09-05 15:03:19.078653625 +0200 +++ /tmp/HEST.dsl 2025-09-05 15:03:19.079511472 +0200 @@ -3,7 +3,7 @@ * AML/ASL+ Disassembler version 20240322 (64-bit version) * Copyright (c) 2000 - 2023 Intel Corporation * - * Disassembly of /tmp/HEST_old + * Disassembly of /tmp/HEST * * ACPI Data Table [HEST] * @@ -11,16 +11,16 @@ */ [000h 0000 004h] Signature : "HEST" [Hardware Error Source Table] -[004h 0004 004h] Table Length : 00000084 +[004h 0004 004h] Table Length : 000000E0 [008h 0008 001h] Revision : 01 -[009h 0009 001h] Checksum : E2 +[009h 0009 001h] Checksum : 6C [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 -[024h 0036 004h] Error Source Count : 00000001 +[024h 0036 004h] Error Source Count : 00000002 [028h 0040 002h] Subtable Type : 000A [Generic Hardware Error Source V2] [02Ah 0042 002h] Source Id : 0000 @@ -55,19 +55,62 @@ [069h 0105 001h] Bit Width : 40 [06Ah 0106 001h] Bit Offset : 00 [06Bh 0107 001h] Encoded Access Width : 04 [QWord Access:64] -[06Ch 0108 008h] Address : 0000000043DA0008 +[06Ch 0108 008h] Address : 0000000043DA0010 [074h 0116 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE [07Ch 0124 008h] Read Ack Write : 0000000000000001 -Raw Table Data: Length 132 (0x84) +[084h 0132 002h] Subtable Type : 000A [Generic Hardware Error Source V2] +[086h 0134 002h] Source Id : 0001 +[088h 0136 002h] Related Source Id : FFFF +[08Ah 0138 001h] Reserved : 00 +[08Bh 0139 001h] Enabled : 01 +[08Ch 0140 004h] Records To Preallocate : 00000001 +[090h 0144 004h] Max Sections Per Record : 00000001 +[094h 0148 004h] Max Raw Data Length : 00000400 + +[098h 0152 00Ch] Error Status Address : [Generic Address Structure] +[098h 0152 001h] Space ID : 00 [SystemMemory] +[099h 0153 001h] Bit Width : 40 +[09Ah 0154 001h] Bit Offset : 00 +[09Bh 0155 001h] Encoded Access Width : 04 [QWord Access:64] +[09Ch 0156 008h] Address : 0000000043DA0008 + +[0A4h 0164 01Ch] Notify : [Hardware Error Notification Structure] +[0A4h 0164 001h] Notify Type : 07 [GPIO] +[0A5h 0165 001h] Notify Length : 1C +[0A6h 0166 002h] Configuration Write Enable : 0000 +[0A8h 0168 004h] PollInterval : 00000000 +[0ACh 0172 004h] Vector : 00000000 +[0B0h 0176 004h] Polling Threshold Value : 00000000 +[0B4h 0180 004h] Polling Threshold Window : 00000000 +[0B8h 0184 004h] Error Threshold Value : 00000000 +[0BCh 0188 004h] Error Threshold Window : 00000000 + +[0C0h 0192 004h] Error Status Block Length : 00000400 +[0C4h 0196 00Ch] Read Ack Register : [Generic Address Structure] +[0C4h 0196 001h] Space ID : 00 [SystemMemory] +[0C5h 0197 001h] Bit Width : 40 +[0C6h 0198 001h] Bit Offset : 00 +[0C7h 0199 001h] Encoded Access Width : 04 [QWord Access:64] +[0C8h 0200 008h] Address : 0000000043DA0018 - 0000: 48 45 53 54 84 00 00 00 01 E2 42 4F 43 48 53 20 // HEST......BOCHS +[0D0h 0208 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE +[0D8h 0216 008h] Read Ack Write : 0000000000000001 + +Raw Table Data: Length 224 (0xE0) + + 0000: 48 45 53 54 E0 00 00 00 01 6C 42 4F 43 48 53 20 // HEST.....lBOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC - 0020: 01 00 00 00 01 00 00 00 0A 00 00 00 FF FF 00 01 // ................ + 0020: 01 00 00 00 02 00 00 00 0A 00 00 00 FF FF 00 01 // ................ 0030: 01 00 00 00 01 00 00 00 00 04 00 00 00 40 00 04 // .............@.. 0040: 00 00 DA 43 00 00 00 00 08 1C 00 00 00 00 00 00 // ...C............ 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0060: 00 00 00 00 00 04 00 00 00 40 00 04 08 00 DA 43 // .........@.....C + 0060: 00 00 00 00 00 04 00 00 00 40 00 04 10 00 DA 43 // .........@.....C 0070: 00 00 00 00 FE FF FF FF FF FF FF FF 01 00 00 00 // ................ - 0080: 00 00 00 00 // .... + 0080: 00 00 00 00 0A 00 01 00 FF FF 00 01 01 00 00 00 // ................ + 0090: 01 00 00 00 00 04 00 00 00 40 00 04 08 00 DA 43 // .........@.....C + 00A0: 00 00 00 00 07 1C 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 04 00 00 00 40 00 04 18 00 DA 43 00 00 00 00 // .....@.....C.... + 00D0: FE FF FF FF FF FF FF FF 01 00 00 00 00 00 00 00 // ................ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <2253eb50df797ab320b4ca610bd22a38e5cfd17a.1758610789.git.mchehab+huawei@kernel.org> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-10-05tests/acpi: virt: allow acpi table changes at DSDT and HEST tablesMauro Carvalho Chehab1-0/+11
We'll be adding a new GED device for HEST GPIO notification and increasing the number of entries at the HEST table. Blocklist testing HEST and DSDT tables until such changes are completed. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <7fca7eb9b801f1b196210f66538234b94bd31c23.1758610789.git.mchehab+huawei@kernel.org> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-10-05vhost-user-test: remove trailing newlines in g_test_message() callsMichael Tokarev1-7/+7
Fixes: c9a1ea9c52 Revert "tests/qtest: use qos_printf instead of g_test_message" Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-10-03migration-test: test cpr-execSteve Sistare1-0/+133
Add a test for the cpr-exec migration mode. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Link: https://lore.kernel.org/r/1759332851-370353-20-git-send-email-steven.sistare@oracle.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-10-01migration-test: strv parameterSteve Sistare2-0/+18
Define migrate_set_parameter_strv. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-19-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01migration-test: migrate_argsSteve Sistare2-24/+43
Define the subroutine migrate_args to return the arguments that are used to exec the source or target qemu process. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-18-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01migration-test: misc exportsSteve Sistare4-0/+12
Export misc definitions needed by the cpr-exec test. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-17-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01migration-test: shm path accessorSteve Sistare1-1/+6
Define an accessor for the shm path. It will be referenced from multiple sites in a subsequent patch. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-16-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01migration-test: only_source optionSteve Sistare2-9/+17
Add the only_source option, analogous to only_target. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-15-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: qtest_init_after_execSteve Sistare2-0/+27
Define a function to create a QTestState object representing the state of QEMU after old QEMU exec's new QEMU. This is needed for testing the cpr-exec migration mode. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-14-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: qtest_qemu_spawn_funcSteve Sistare1-5/+13
Allow the qtest_qemu_spawn caller to pass the function to be called to perform the spawn. The opaque argument is needed by a new spawn function in a subsequent patch. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-13-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: qtest_create_test_stateSteve Sistare1-7/+14
Refactor qtest_spawn_qemu and create a subroutine to create a QTestState object, to be used in a subsequent patch. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-12-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: qtest_qemu_argsSteve Sistare2-23/+39
Define an accessor that returns all the arguments used to exec QEMU. Collect the arguments that were passed to qtest_spawn_qemu, plus the trace arguments that were composed inside qtest_spawn_qemu, and move them to a new function qtest_qemu_args. This will be needed to test the cpr-exec migration mode. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-11-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: export qtest_qemu_binarySteve Sistare2-1/+10
Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/1759332851-370353-10-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: optimize qtest_get_machinesSteve Sistare1-5/+7
qtest_get_machines returns the machines supported by the QEMU binary described by an environment variable and caches the result. If the next call to qtest_get_machines passes the same variable name, the cached result is returned, but if the name changes, the caching is defeated. To make caching more effective, remember the path of the QEMU binary instead. Different env vars, eg QTEST_QEMU_BINARY_SRC and QTEST_QEMU_BINARY_DST, usually resolve to the same path. Before the optimization, the test /x86_64/migration/precopy/unix/plain exec's QEMU and calls query-machines 3 times. After optimization, that only happens once. This does not significantly speed up the tests, but it reduces QTEST_LOG output, and launches fewer QEMU instances, making it easier to debug problems. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <87h5ymdzrf.fsf@pond.sub.org> Link: https://lore.kernel.org/qemu-devel/1758290310-349623-1-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest/migration: Fix cpr-tests in case the machine is not availableThomas Huth3-4/+9
When QEMU has been compiled with "--without-default-devices", the migration cpr-tests are currently failing since the first test leaves a socket file behind that avoids that the second test can be initialized correctly. Make sure that we delete the socket file in case that the migrate_start() failed due to the missing machine. Signed-off-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250930090932.235151-1-thuth@redhat.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-10-01tests/qtest: Add missing checks for the availability of machinesThomas Huth3-3/+5
When QEMU has been compiled with "--without-default-devices", the machines might not be available in the binary. Let's properly check for the machines before running the tests to avoid that they are failing in this case. Signed-off-by: Thomas Huth <thuth@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250930090444.234431-1-thuth@redhat.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-09-19treewide: use qemu_set_blocking instead of g_unix_set_fd_nonblockingVladimir Sementsov-Ogievskiy2-4/+2
Instead of open-coded g_unix_set_fd_nonblocking() calls, use QEMU wrapper qemu_set_blocking(). Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> [DB: fix missing closing ) in tap-bsd.c, remove now unused GError var] Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2025-09-16qtest/bios-tables-test: Update tables for smmuv3 testsShameer Kolothum1-4/+0
For the legacy smmuv3 test case, generated IORT has a single SMMUv3 node, a Root Complex(RC) node and 1 ITS node. RC node features 4 ID mappings, of which 2 points to SMMU node and the remaining ones points to ITS. pcie.0 -> {SMMU0} -> {ITS} {RC} pcie.1 -> {SMMU0} -> {ITS} pcie.2 -> {ITS} [all other ids] -> {ITS} ... [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 [033h 0051 1] Revision : 01 [034h 0052 4] Identifier : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 04 [049h 0073 2] Length : 0058 [04Bh 0075 1] Revision : 04 [04Ch 0076 4] Identifier : 00000001 [050h 0080 4] Mapping Count : 00000001 [054h 0084 4] Mapping Offset : 00000044 [058h 0088 8] Base Address : 0000000009050000 [060h 0096 4] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 [064h 0100 4] Reserved : 00000000 [068h 0104 8] VATOS Address : 0000000000000000 [070h 0112 4] Model : 00000000 [074h 0116 4] Event GSIV : 0000006A [078h 0120 4] PRI GSIV : 0000006B [07Ch 0124 4] GERR GSIV : 0000006D [080h 0128 4] Sync GSIV : 0000006C [084h 0132 4] Proximity Domain : 00000000 [088h 0136 4] Device ID Mapping Index : 00000000 [08Ch 0140 4] Input base : 00000000 [090h 0144 4] ID Count : 0000FFFF [094h 0148 4] Output Base : 00000000 [098h 0152 4] Output Reference : 00000030 [09Ch 0156 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0A0h 0160 1] Type : 02 [0A1h 0161 2] Length : 0074 [0A3h 0163 1] Revision : 03 [0A4h 0164 4] Identifier : 00000002 [0A8h 0168 4] Mapping Count : 00000004 [0ACh 0172 4] Mapping Offset : 00000024 [0B0h 0176 8] Memory Properties : [IORT Memory Access Properties] [0B0h 0176 4] Cache Coherency : 00000001 [0B4h 0180 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [0B5h 0181 2] Reserved : 0000 [0B7h 0183 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [0B8h 0184 4] ATS Attribute : 00000000 [0BCh 0188 4] PCI Segment Number : 00000000 [0C0h 0192 1] Memory Size Limit : 40 [0C1h 0193 2] PASID Capabilities : 0000 [0C3h 0195 1] Reserved : 00 [0C4h 0196 4] Input base : 00000000 [0C8h 0200 4] ID Count : 000001FF [0CCh 0204 4] Output Base : 00000000 [0D0h 0208 4] Output Reference : 00000048 [0D4h 0212 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0D8h 0216 4] Input base : 00001000 [0DCh 0220 4] ID Count : 000000FF [0E0h 0224 4] Output Base : 00001000 [0E4h 0228 4] Output Reference : 00000048 [0E8h 0232 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0ECh 0236 4] Input base : 00000200 [0F0h 0240 4] ID Count : 00000DFF [0F4h 0244 4] Output Base : 00000200 [0F8h 0248 4] Output Reference : 00000030 [0FCh 0252 4] Flags (decoded below) : 00000000 Single Mapping : 0 [100h 0256 4] Input base : 00001100 [104h 0260 4] ID Count : 0000EEFF [108h 0264 4] Output Base : 00001100 [10Ch 0268 4] Output Reference : 00000030 [110h 0272 4] Flags (decoded below) : 00000000 Single Mapping : 0 For the smmuv3-dev test case, IORT has 2 SMMUV3 nodes, 1 RC node and 1 ITS node. RC node features 4 ID mappings. 2 of them target the 2 SMMU nodes while the others targets the ITS. pcie.0 -> {SMMU0} -> {ITS} {RC} pcie.1 -> {SMMU1} -> {ITS} pcie.2 -> {ITS} [all other ids] -> {ITS} ... [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 [033h 0051 1] Revision : 01 [034h 0052 4] Identifier : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 04 [049h 0073 2] Length : 0058 [04Bh 0075 1] Revision : 04 [04Ch 0076 4] Identifier : 00000001 [050h 0080 4] Mapping Count : 00000001 [054h 0084 4] Mapping Offset : 00000044 [058h 0088 8] Base Address : 000000000C000000 [060h 0096 4] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 [064h 0100 4] Reserved : 00000000 [068h 0104 8] VATOS Address : 0000000000000000 [070h 0112 4] Model : 00000000 [074h 0116 4] Event GSIV : 00000090 [078h 0120 4] PRI GSIV : 00000091 [07Ch 0124 4] GERR GSIV : 00000093 [080h 0128 4] Sync GSIV : 00000092 [084h 0132 4] Proximity Domain : 00000000 [088h 0136 4] Device ID Mapping Index : 00000000 [08Ch 0140 4] Input base : 00000000 [090h 0144 4] ID Count : 0000FFFF [094h 0148 4] Output Base : 00000000 [098h 0152 4] Output Reference : 00000030 [09Ch 0156 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0A0h 0160 1] Type : 04 [0A1h 0161 2] Length : 0058 [0A3h 0163 1] Revision : 04 [0A4h 0164 4] Identifier : 00000002 [0A8h 0168 4] Mapping Count : 00000001 [0ACh 0172 4] Mapping Offset : 00000044 [0B0h 0176 8] Base Address : 000000000C020000 [0B8h 0184 4] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 [0BCh 0188 4] Reserved : 00000000 [0C0h 0192 8] VATOS Address : 0000000000000000 [0C8h 0200 4] Model : 00000000 [0CCh 0204 4] Event GSIV : 00000094 [0D0h 0208 4] PRI GSIV : 00000095 [0D4h 0212 4] GERR GSIV : 00000097 [0D8h 0216 4] Sync GSIV : 00000096 [0DCh 0220 4] Proximity Domain : 00000000 [0E0h 0224 4] Device ID Mapping Index : 00000000 [0E4h 0228 4] Input base : 00000000 [0E8h 0232 4] ID Count : 0000FFFF [0ECh 0236 4] Output Base : 00000000 [0F0h 0240 4] Output Reference : 00000030 [0F4h 0244 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0F8h 0248 1] Type : 02 [0F9h 0249 2] Length : 0074 [0FBh 0251 1] Revision : 03 [0FCh 0252 4] Identifier : 00000003 [100h 0256 4] Mapping Count : 00000004 [104h 0260 4] Mapping Offset : 00000024 [108h 0264 8] Memory Properties : [IORT Memory Access Properties] [108h 0264 4] Cache Coherency : 00000001 [10Ch 0268 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [10Dh 0269 2] Reserved : 0000 [10Fh 0271 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [110h 0272 4] ATS Attribute : 00000000 [114h 0276 4] PCI Segment Number : 00000000 [118h 0280 1] Memory Size Limit : 40 [119h 0281 2] PASID Capabilities : 0000 [11Bh 0283 1] Reserved : 00 [11Ch 0284 4] Input base : 00000000 [120h 0288 4] ID Count : 000001FF [124h 0292 4] Output Base : 00000000 [128h 0296 4] Output Reference : 00000048 [12Ch 0300 4] Flags (decoded below) : 00000000 Single Mapping : 0 [130h 0304 4] Input base : 00001000 [134h 0308 4] ID Count : 000000FF [138h 0312 4] Output Base : 00001000 [13Ch 0316 4] Output Reference : 000000A0 [140h 0320 4] Flags (decoded below) : 00000000 Single Mapping : 0 [144h 0324 4] Input base : 00000200 [148h 0328 4] ID Count : 00000DFF [14Ch 0332 4] Output Base : 00000200 [150h 0336 4] Output Reference : 00000030 [154h 0340 4] Flags (decoded below) : 00000000 Single Mapping : 0 [158h 0344 4] Input base : 00001100 [15Ch 0348 4] ID Count : 0000EEFF [160h 0352 4] Output Base : 00001100 [164h 0356 4] Output Reference : 00000030 [168h 0360 4] Flags (decoded below) : 00000000 Single Mapping : 0 Note: DSDT changes are not described here as it is not impacted by the way the SMMUv3 is instantiated. Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com> Reviewed-by: Donald Dutile <ddutile@redhat.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Message-id: 20250829082543.7680-12-skolothumtho@nvidia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-09-16qtest/bios-tables-test: Add tests for legacy smmuv3 and smmuv3 deviceShameer Kolothum1-0/+86
For the legacy SMMUv3 test, the setup includes three PCIe Root Complexes, one of which has bypass_iommu enabled. The generated IORT table contains a single SMMUv3 node, a Root Complex(RC) node and 1 ITS node. RC node features 4 ID mappings, of which 2 points to SMMU node and the remaining ones points to ITS. pcie.0 -> {SMMU0} -> {ITS} {RC} pcie.1 -> {SMMU0} -> {ITS} pcie.2 -> {ITS} [all other ids] -> {ITS} For the -device arm-smmuv3,... test, the configuration also includes three Root Complexes, with two connected to separate SMMUv3 devices. The resulting IORT table contains 1 RC node, 2 SMMU nodes and 1 ITS node. RC node features 4 ID mappings. 2 of them target the 2 SMMU nodes while the others targets the ITS. pcie.0 -> {SMMU0} -> {ITS} {RC} pcie.1 -> {SMMU1} -> {ITS} pcie.2 -> {ITS} [all other ids] -> {ITS} Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com> Reviewed-by: Donald Dutile <ddutile@redhat.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Message-id: 20250829082543.7680-11-skolothumtho@nvidia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-09-16bios-tables-test: Allow for smmuv3 test data.Shameer Kolothum1-0/+4
The tests to be added exercise both legacy(iommu=smmuv3) and new -device arm-smmuv3,.. cases. Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com> Reviewed-by: Donald Dutile <ddutile@redhat.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Message-id: 20250829082543.7680-10-skolothumtho@nvidia.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-09-01Revert "tests/qtest: use qos_printf instead of g_test_message"Markus Armbruster2-19/+13
This reverts commit 30ea13e9d97dcbd4ea541ddf9e8857fa1d5cb30f. Also rewrites qos_printf() calls added later. "make check" prints many lines like stdout: 138: UNKNOWN: # # qos_test running single test in subprocess stdout: 139: UNKNOWN: # # set_protocol_features: 0x42 stdout: 140: UNKNOWN: # # set_owner: start of session stdout: 141: UNKNOWN: # # vhost-user: un-handled message: 14 stdout: 142: UNKNOWN: # # vhost-user: un-handled message: 14 stdout: 143: UNKNOWN: # # set_vring(0)=enabled stdout: 144: UNKNOWN: # # set_vring(1)=enabled stdout: 145: UNKNOWN: # # set_vring(0)=enabled stdout: 146: UNKNOWN: # # set_vring(1)=enabled stdout: 147: UNKNOWN: # # set_vring(0)=enabled stdout: 148: UNKNOWN: # # set_vring(1)=enabled stdout: 149: UNKNOWN: # # set_vring(0)=enabled stdout: 150: UNKNOWN: # # set_vring(1)=enabled stdout: 151: UNKNOWN: # # set_vring(0)=enabled stdout: 152: UNKNOWN: # # set_vring(1)=enabled stdout: 153: UNKNOWN: # # set_vring_num: 0/256 stdout: 154: UNKNOWN: # # set_vring_addr: 0x7f9060000000/0x7f905ffff000/0x7f9060001000 Turns out this is qos-test, and the culprit is a commit meant to ease debugging. Revert it until a better solution is found. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250728145747.3165315-1-armbru@redhat.com> [Commit message clarified]
2025-09-01qtest/qom-test: Don't bother to execute QMP command quitMarkus Armbruster1-4/+0
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250725135034.2280477-5-armbru@redhat.com> Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
2025-09-01qtest/qom-test: Traverse entire QOM treeMarkus Armbruster1-1/+1
This test traverses the QOM sub-tree rooted at /machine. Traverse the entire tree instead. The x86_64 test runs some 40 additional QMP commands, and stays under 5s for me. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250725135034.2280477-4-armbru@redhat.com> Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
2025-09-01qtest/qom-test: Shallow testing of qom-list / qom-getMarkus Armbruster1-1/+1
This test traverses the QOM sub-tree rooted at /machine with a combination of qom-list and qom-get. In my x86_64 testing, it runs almost 12000 QMP commands in 34 seconds. With -m slow, we test more machines, and it takes almost 84000 commands in almost four minutes. Since commit 3dd93992ffb (tests/qtest/qom-test: unit test for qom-list-get), the test traverses this tree a second time, with qom-list-get. In my x86_64 testing, this takes some 200 QMP commands and around two seconds, and some 1100 in just under 12s with -m slow. Traversing the entire tree is useful, because it exercise the QOM property getters. Traversing it twice not so much. Make the qom-list / qom-get test shallow unless -m slow is given: don't recurse. Cuts the number of commands to around 600, and run time to under 5s for me. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20250725135034.2280477-3-armbru@redhat.com> Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
2025-08-30tests/qtest/libqtest.h: Remove stray space from doc commentPeter Maydell1-1/+1
The doc comment for qtest_cb_for_every_machine has a stray space at the start of its description, which makes kernel-doc think that this line is part of the documentation of the skip_old_versioned argument. The result is that the HTML doesn't have a "Description" section and the text is instead put in the wrong place. Remove the stray space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Message-id: 20250814171324.1614516-3-peter.maydell@linaro.org
2025-08-01tests/acpi: virt: update HEST file with its current dataMauro Carvalho Chehab1-1/+0
Now that HEST table is checked for aarch64, add the current firmware file. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <e3527be1610b2ef6b20ca2efa025de91a1f1e0a6.1749741085.git.mchehab+huawei@kernel.org>
2025-08-01tests/qtest/bios-tables-test: extend to also check HEST tableMauro Carvalho Chehab1-1/+1
Currently, aarch64 can generate a HEST table when loaded with -machine ras=on. Add support for it. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <9ce77140500ef68cc939d63952c25579f711ea52.1749741085.git.mchehab+huawei@kernel.org>
2025-08-01tests/acpi: virt: add an empty HEST fileMauro Carvalho Chehab1-0/+1
Such file will be used to track HEST table changes. For now, disallow HEST table check until we update it to the current data. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <e25ea751a23c7d8da812233c83ce943efbeaaf91.1749741085.git.mchehab+huawei@kernel.org>
2025-07-16tests/qtest/qom-test: unit test for qom-list-getSteve Sistare1-1/+115
Add a unit test for qom-list-get. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-ID: <1752248703-217318-4-git-send-email-steven.sistare@oracle.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
generated by cgit v1.1 at 2025-12-31 03:34:27 +0000