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2025-05-29tests/qtest: Migrate GMAC test from 7xx to 8xxNabih Estefan2-5/+86
For upstreaming we migrated this test to 7xx (since that was already upstream) move it back to 8xx where it can check the 4 GMACs since that is the board this test was originally created for. Signed-off-by: Nabih Estefan <nabihestefan@google.com> Message-id: 20250508220718.735415-3-nabihestefan@google.com Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-28qapi: make s390x specific CPU commands unconditionally availableDaniel P. Berrangé1-0/+1
This removes the TARGET_S390X and CONFIG_KVM conditions from the CPU commands that are conceptually specific to s390x. Top level stubs are provided to cope with non-s390x targets, or builds without KVM. The removal of CONFIG_KVM is justified by the fact there is no conceptual difference between running 'qemu-system-s390x -accel tcg' on a build with and without KVM built-in, so apps only using TCG can't rely on the CONFIG_KVM in the schema. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-ID: <20250522190542.588267-11-pierrick.bouvier@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2025-05-25test/qtest/hace: Add tests for AST2700Jamin Lin2-0/+100
The HACE models in AST2600 and AST2700 are nearly identical. Based on the AST2600 test cases, new tests have been added for AST2700. Implemented test functions for SHA-256, SHA-384, SHA-512, and MD5. Added scatter-gather and accumulation test variants. For AST2700, the HACE controller base address starts at "0x12070000", and the DRAM start address is "0x4_00000000". Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-29-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Support to validate 64-bit hmac key buffer addressesJamin Lin3-0/+20
Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and "HACE_HASH_KEY_BUFF_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-28-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Support to test upper 32 bits of digest and source addressesJamin Lin2-1/+16
Added "src_hi" and "dest_hi" fields to "AspeedMasks" for 64-bit addresses test. Updated "aspeed_test_addresses" to validate "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI". Ensured correct masking of 64-bit addresses by checking both lower and upper 32-bit registers. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-27-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Support 64-bit source and digest addresses for AST2700Jamin Lin2-0/+5
Added "HACE_HASH_SRC_HI" and "HACE_HASH_DIGEST_HI", "HACE_HASH_KEY_BUFF_HI" registers to store upper 32 bits. Updated "write_regs" to handle 64-bit source and digest addresses. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-26-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Update source data and digest data type to 64-bitJamin Lin2-46/+46
Currently, the hash data source and digest result buffer addresses are set to 32-bit. However, the AST2700 CPU is a 64-bit Cortex-A35 architecture, and its DRAM base address is also 64-bit. To support AST2700, update the hash data source address and digest result buffer address to use 64-bit addressing. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-25-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Add tests for AST1030Jamin Lin1-0/+76
The HACE model in AST2600 and AST1030 is identical. Referencing the AST2600 test cases, new tests have been created for AST1030. Implemented test functions for SHA-256, SHA-384, SHA-512, and MD5. Added scatter-gather and accumulation test variants. For AST1030, the HACE controller base address starts at "0x7e6d0000", and the SDRAM start address is "0x0". Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-24-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Add SHA-384 tests for AST2600Jamin Lin1-0/+18
Introduced "test_sha384_ast2600" to validate SHA-384 hashing. Added "test_sha384_sg_ast2600" for scatter-gather SHA-384 verification. Implemented "test_sha384_accum_ast2600" to test SHA-384 accumulation. Registered new test cases in "main" to ensure execution. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-23-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Add SHA-384 test cases for ASPEED HACE modelJamin Lin2-3/+171
Introduced SHA-384 test functions to verify hashing operations. Extended support for scatter-gather ("_sg") and accumulation ("_accum") tests. Updated test result vectors for SHA-384 validation. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-22-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Adjust test address range for AST1030 due to SRAM limitationsJamin Lin1-15/+15
The digest_addr is set to "src_addr + 0x1000000", where src_addr is the DRAM base address. However, the value 0x1000000 (16MB) is too large because the AST1030 does not support DRAM, and its SRAM size is only 768KB. A range size of 0x10000 (64KB) is sufficient for HACE test cases, as the test vector size does not exceed 64KB. Updates: 1. Direct Access Mode Update digest_addr to "src_addr + 0x10000" in the following functions: aspeed_test_md5 aspeed_test_sha256 aspeed_test_sha512 2. Scatter-Gather (SG) Mode Update source address for different SG buffer addresses in the following functions: src_addr1 = src_addr + 0x10000 src_addr2 = src_addr + 0x20000 src_addr3 = src_addr + 0x30000 digest_addr = src_addr + 0x40000 aspeed_test_sha256_sg aspeed_test_sha512_sg 3. ACC Mode Update Update the SG List start address: src_addr + 0x10000 Update the SG List buffer size to 0x30000 (192KB). buffer_addr = src_addr + 0x10000 digest_addr = src_addr + 0x40000 Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-21-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest/hace: Specify explicit array sizes for test vectors and hash resultsJamin Lin1-13/+13
To enhance code readability and prevent potential buffer overflows or unintended size assumptions, this commit updates all fixed-size array declarations to use explicit array sizes. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-20-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25test/qtest: Introduce a new aspeed-hace-utils.c to place common testcasesJamin Lin4-495/+547
The test cases for the ASPEED HACE model were originally placed in aspeed_hace-test.c. However, this test file only supports ARM32. To enable compatibility with all ASPEED SoCs, including the AST2700, which uses the AArch64 architecture, this update introduces a new source file, aspeed-hace-utils.c. All common APIs and test cases have been moved from aspeed_hace-test.c to aspeed-hace-utils.c to facilitate reuse across different ASPEED SoCs. As a result, these test cases can now be reused for AST2700 and future ASPEED SoC testing. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-19-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25tests/qtest: Reorder aspeed test listJamin Lin1-5/+5
Reordered the aspeed test list to keep the alphabetical order. No functional changes in test behavior. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Acked-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-18-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25tests/qtest/aspeed_smc-test: Fix memory leaksJamin Lin1-0/+5
Link: https://patchwork.kernel.org/project/qemu-devel/patch/20250509175047.26066-1-farosas@suse.de/ Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250513080806.1005996-1-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-25tests/qtest/ast2700-smc-test: Fix leakFabiano Rosas1-0/+1
ASAN spotted a leak of the memory used to hold the tmp_path: Direct leak of 35 byte(s) in 1 object(s) allocated from: #0 0x55e29aa96da9 in malloc ../projects/compiler-rt/lib/asan/asan_malloc_linux.cpp:69:3 #1 0x7fe0cfb26518 in g_malloc ../glib/gmem.c:106 #2 0x7fe0cfb4146e in g_strconcat ../glib/gstrfuncs.c:629 #3 0x7fe0cfb0a78f in g_get_tmp_name ../glib/gfileutils.c:1742 #4 0x7fe0cfb0b00b in g_file_open_tmp ../glib/gfileutils.c:1802 #5 0x55e29ab53961 in test_ast2700_evb ../tests/qtest/ast2700-smc-test.c:20:10 #6 0x55e29ab53803 in main ../tests/qtest/ast2700-smc-test.c:65:5 #7 0x7fe0cf7bd24c in __libc_start_main ../csu/libc-start.c:308 #8 0x55e29a9f7759 in _start ../sysdeps/x86_64/start.S:120 Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Message-ID: <20250509175047.26066-1-farosas@suse.de> Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-05-20tests/qtest/migration: add postcopy tests with multifdPrasad Pandit4-2/+122
Add new qtests to run postcopy migration with multifd channels enabled. Signed-off-by: Prasad Pandit <pjp@fedoraproject.org> Link: https://lore.kernel.org/r/20250512125124.147064-4-ppandit@redhat.com [peterx: rename all new tests to be under /migration/multifd+postcopy/] Signed-off-by: Peter Xu <peterx@redhat.com>
2025-05-20qtest/migration/rdma: Add test for rdma migration with ipv6Li Zhijian1-4/+17
Recently, we removed ipv6 restriction[0] from RDMA migration, add a test for it. [0] https://lore.kernel.org/qemu-devel/20250326095224.9918-1-jinpu.wang@ionos.com/ Cc: Jack Wang <jinpu.wang@ionos.com> Cc: Michael R. Galaxy <mrgalaxy@nvidia.com> Cc: Peter Xu <peterx@redhat.com> Cc: Yu Zhang <yu.zhang@ionos.com> Reviewed-by: Jack Wang <jinpu.wang@ionos.com> Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Link: https://lore.kernel.org/r/20250513012207.2867069-1-lizhijian@fujitsu.com [peterx: Fix over long lines] Signed-off-by: Peter Xu <peterx@redhat.com>
2025-05-20qtest/migration/rdma: Enforce RLIMIT_MEMLOCK >= 128MB requirementLi Zhijian1-0/+34
Ensure successful migration over RDMA by verifying that RLIMIT_MEMLOCK is set to at least 128MB. This allocation is necessary due to the requirement to pin significant portions of guest memory, typically exceeding 100MB in this test, while the remainder is transmitted as compressed zero pages. Otherwise, it will fail with: stderr: qemu-system-x86_64: cannot get rkey qemu-system-x86_64: error while loading state section id 2(ram) qemu-system-x86_64: load of migration failed: Operation not permitted qemu-system-x86_64: rdma migration: recv polling control error! qemu-system-x86_64: RDMA is in an error state waiting migration to abort! qemu-system-x86_64: failed to save SaveStateEntry with id(name): 2(ram): -1 qemu-system-x86_64: Channel error: Operation not permitted Reported-by: Peter Xu <peterx@redhat.com> Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Link: https://lore.kernel.org/r/20250509014211.1272640-1-lizhijian@fujitsu.com Signed-off-by: Peter Xu <peterx@redhat.com>
2025-05-12Merge tag 'qtest-20250509-pull-request' of https://gitlab.com/farosas/qemu ↵Stefan Hajnoczi6-56/+70
into staging Qtest pull request - Fix migration-test invocation of qtest_init - Simplify byte-swapping for virtio in libqos - New cpu hotplug test for loongarch64 # -----BEGIN PGP SIGNATURE----- # # iQJEBAABCAAuFiEEqhtIsKIjJqWkw2TPx5jcdBvsMZ0FAmgecLgQHGZhcm9zYXNA # c3VzZS5kZQAKCRDHmNx0G+wxnaiLD/9pW1eU9we/KDm3wJg9zRS37h5OmSF+ogIN # ziXG1XmyXKK+QAybInZ1d3oaGqZoR+hhJ6RWmf6+E57ZyJ2EPtasJhekOulAZYZI # yWXtbWzKnaCc+AhohM+xJGC1XObAvvfz+8wjMFHnuJn0BBiBBWXkiHljG02KdkT6 # Ca+83+NSn/6OJYENTgaXiXkviNELbzDBTFgtWKkW0+bniCsbfrnuGqWbf43/cDbr # vnfiIt4o6jgjvEaBMid3cAtFUzI9gRtB7tk/sGvdPWGPkyjxTt5rnVxe6CBqh1SA # j5CbrcgPt7HxgdBEZC38o2tj5YxAjUZ5TXziouoxom0vzHSTep/NJih+XIhtXM8f # ABL9YZCBGvb3ja8NvXZwsLkcbSDbfTG8CNtHCTx3S3qagENxd6mUj4GMaOQxNQ1y # DUPGQetOzBIsYQOjt9fITN2S7oprXjpHwgV6TD/VOkJ+YVML1mRNsDi2sUkzH8jF # IUmjHWqJvyTvPY8dfVyYWLLhPUgJJdEfjgyT2qG6nbEcgd5seuB/3Rm/+VbqST+e # JUjbBOJStPdCQLtvlcDv+r/u2VwRta6f8ZU+DTlUnBboRSoHBrD3vzAa4uDLTufC # K01SC/xxzIMXR0Ji9qB9uKA6FJmbDdJhzBOzCFm7q7UCrRCNcgfhWO/OXuOqTg7j # bPDmCKA+dw== # =MZlp # -----END PGP SIGNATURE----- # gpg: Signature made Fri 09 May 2025 17:16:40 EDT # gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D # gpg: issuer "farosas@suse.de" # gpg: Good signature from "Fabiano Rosas <farosas@suse.de>" [unknown] # gpg: aka "Fabiano Almeida Rosas <fabiano.rosas@suse.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D * tag 'qtest-20250509-pull-request' of https://gitlab.com/farosas/qemu: tests/qtest/cpu-plug-test: Add cpu hotplug support for LoongArch tests/qtest/libqos: Avoid double swapping when using modern virtio qtest: introduce qtest_init_ext Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-09tests/qtest/cpu-plug-test: Add cpu hotplug support for LoongArchBibo Mao2-1/+26
Add cpu hotplug testcase support for LoongArch system, it passes to run with command "make check-qtest-loongarch64" as following: qemu:qtest+qtest-loongarch64 / qtest-loongarch64/cpu-plug-test OK 0.38s 1 subtests passed Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250314085130.4184272-1-maobibo@loongson.cn> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-05-09tests/qtest/libqos: Avoid double swapping when using modern virtioThomas Huth1-15/+29
The logic in the qvirtio_read/write function is rather a headache, involving byte-swapping when the target is big endian, just to maybe involve another byte-swapping in the qtest_read/write function immediately afterwards (on the QEMU side). Let's do it in a more obvious way here: For virtio 1.0, we know that the values have to be little endian, so let's read/write the bytes in that well known order here. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250430132817.610903-1-thuth@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-05-09qtest: introduce qtest_init_extVladimir Sementsov-Ogievskiy3-40/+15
Merge qtest_init_with_env_and_capabilities() and qtest_init_with_env() into one qtest_init_ext(). Reasons: 1. qtest_init_with_env() is just wrong: it gets do_connect parameter but always pass true to qtest_init_with_env_and_capabilities(). Happily, all qtest_init_with_env() callers pass true as well. 2. qtest_init_with_env() is not used outside of libqtest.c, so no reason to keep it as public function 3. and in libqtest.c it's used not often, so no problem to use more generic function instead. Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250410162250.329941-1-vsementsov@yandex-team.ru> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-05-08tests/qtest/q35-test: Remove the obsolete test_without_smram_base testThomas Huth1-36/+1
With the release of QEMU 10.1, the pc-q35-4.1 machine will be older than 6 years and thus will get disabled automatically by the MACHINE_VER_DELETION() macro. Remove the related test to avoid that the q35-test is failing when the machine is not available anymore. Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-05-05Merge tag 'pull-9p-20250505' of https://github.com/cschoenebeck/qemu into ↵Stefan Hajnoczi3-0/+98
staging 9pfs changes: * Fixes for file descriptor reclaiming algorithm (i.e. when running towards host's allowed limit of max. open file descriptors). * Additional fixes on use-after-unlink idiom (i.e. client operations on a file descriptor after file has been removed). # -----BEGIN PGP SIGNATURE----- # # iQJLBAABCgA1FiEEltjREM96+AhPiFkBNMK1h2Wkc5UFAmgYie0XHHFlbXVfb3Nz # QGNydWRlYnl0ZS5jb20ACgkQNMK1h2Wkc5XbDRAAq5SW7Hxifdhf1ZRBtkVOD88q # Iw/OrMLIke4pCQwRElCDrE0mhycqyUpNX67eIye7qx0dJl2btFQUI9L6YuCDFtcG # fPORZl51V81BOXqS8MhbK1oDxidl+cnpA8GcA1OyhYjxBifOy/x/0KG0pZVwzi0Y # jhAIdsfeSenTE0Zzb02oh9mVmlMtKnwrSz7R0IB3Sv575CQiO76OM5B9sps1TUPu # NrnQYBIB+EwJnI+l9NOKzNa7AUxV/S73OFCyJkQCON2ZHWiVadgXxjlX3kHyh9oL # 3uiiTdC2694jU0RaVMMSNLfdIG4YK2GkKPHM7qLYF8Kdc5QogEJifS/RoihCnZFR # X72G7mOVo8/7goRBt3DGQCwz3eUgqTO9iPFn1hJRvx9x/CVlFi2eOP+5nHR5PMEO # qSY2of6LziCslNXvxjjhf7HmRhlugkHqpr+UGTxwMGazr88bHKNFbsh/3BcTmWwW # /wGRfEFse3exgFiCtoebavxbJaUeI0Y93S4KidOhhqrQFz24k2AElgFrb1gEpbht # GWW8YEblL7Lj8mecFATXKiInHCyhVPFmuAO//Wbu9juJVcNPtl67f017bCR+90H3 # GrRJqorHrp6icGQmXSM+Qdrr3B21RZwqb3W4mdMOWN3Zg5bHPHJ6rx8BRe7qDHBH # mWtvrsUfcL0sRW0nkgc= # =hfW6 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 05 May 2025 05:50:37 EDT # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * tag 'pull-9p-20250505' of https://github.com/cschoenebeck/qemu: 9pfs: fix 'total_open_fd' decrementation tests/9p: Test `Tsetattr` can truncate unlinked file tests/9p: add 'Tsetattr' request to test client 9pfs: Introduce futimens file op 9pfs: Introduce ftruncate file op 9pfs: Don't use file descriptors in core code 9pfs: local : Introduce local_fid_fd() helper 9pfs: fix FD leak and reduce latency of v9fs_reclaim_fd() 9pfs: fix concurrent v9fs_reclaim_fd() calls Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-05tests/9p: Test `Tsetattr` can truncate unlinked fileGreg Kurz1-0/+14
Enhance the `use-after-unlink` test with a new check for the case where the client wants to alter the size of an unlinked file for which it still has an active fid. Suggested-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <20250312152933.383967-7-groug@kaod.org> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
2025-05-05tests/9p: add 'Tsetattr' request to test clientChristian Schoenebeck3-0/+84
Add and implement functions to 9pfs test client for sending a 9p2000.L 'Tsetattr' request and receiving its 'Rsetattr' response counterpart. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20250312152933.383967-6-groug@kaod.org>
2025-05-02tests/qtest/migration: consolidate set capabilitiesPrasad Pandit9-84/+150
Migration capabilities are set in multiple '.start_hook' functions for various tests. Instead, consolidate setting capabilities in 'migrate_start_set_capabilities()' function which is called from the 'migrate_start()' function. While simplifying the capabilities setting, it helps to declutter the qtest sources. Suggested-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Prasad Pandit <pjp@fedoraproject.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250411114534.3370816-7-ppandit@redhat.com> [fix open brace] Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-05-02migration: Add qtest for migration over RDMALi Zhijian1-0/+66
This qtest requires there is a RDMA(RoCE) link in the host. In order to make the test work smoothly, introduce a scripts/rdma-migration-helper.sh to detect existing RoCE link before running the test. Test will be skipped if there is no available RoCE link. # Start of rdma tests # Running /x86_64/migration/precopy/rdma/plain ok 1 /x86_64/migration/precopy/rdma/plain # SKIP No rdma link available # To enable the test: # Run 'scripts/rdma-migration-helper.sh setup' with root to setup a new rdma/rxe link and rerun the test # Optional: run 'scripts/rdma-migration-helper.sh clean' to revert the 'setup' # End of rdma tests Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Stefan Hajnoczi <stefanha@gmail.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Message-ID: <20250311024221.363421-1-lizhijian@fujitsu.com> [add 'head -1' to script, reformat test message] Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-04-24Merge tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru into stagingStefan Hajnoczi8-18/+3
Miscellaneous patches for 2025-04-24 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmgJ7dYSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTiZIP/1PFAg/s3SoiLQwH/ZrjyUkm1kiKnjOH # CC5Stw6I9tuYnDAhASAdSymofLv0NNydNe5ai6ZZAWRyRYjIcfNigKAGK4Di+Uhe # nYxT0Yk8hNGwMhl6NnBp4mmCUNCwcbjT9uXdiYQxFYO/qqYR1388xJjeN3c362l3 # AaLrE5bX5sqa6TAkTeRPjeIqxlyGT7jnCrN7I1hMhDvbc3ITF3AMfYFMjnmAQgr+ # mTWGS1QogqqkloODbR1DKD1CAWOlpK+0HibhNF+lz71P0HlwVvy+HPXso505Wf0B # dMwlSrZ1DnqNVF/y5IhMEMslahKajbjbFVhBjmrGl/8T821etCxxgB20c0vyFRy8 # qTyJGwBZaEo0VWr70unSmq45TRoeQvdHAw/e+GtilR0ci80q2ly4gbObnw7L8le+ # gqZo4IWmrwp2sbPepE57sYKQpEndwbRayf/kcFd0LPPpeINu9ZooXkYX0pOo6Cdg # vDKMaEB1/fmPhjSlknxkKN9LZdR+nDw8162S1CKsUdWanAOjmP8haN19aoHhIekZ # q+r2qUq/U827yNy9/qbInmsoFYDz9s6sAOE63jibd5rZZ9Anei6NOSgLzA4CqCR1 # +d0+TXp19gP9mLMFs7/ZclwkXCz47OQYhXYphjI3wM9x+xbdRcI4n+DOH5u5coKx # AsA6+2n0GF4Y # =GaoH # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Apr 2025 03:52:54 EDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-misc-2025-04-24' of https://repo.or.cz/qemu/armbru: cleanup: Drop pointless label at end of function cleanup: Drop pointless return at end of function cleanup: Re-run return_directly.cocci Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-24cleanup: Drop pointless return at end of functionMarkus Armbruster5-5/+0
A few functions now end with a label. The next commit will clean them up. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250407082643.2310002-3-armbru@redhat.com> [Straightforward conflict with commit 988ad4ccebb6 (hw/loongarch/virt: Fix cpuslot::cpu set at last in virt_cpu_plug()) resolved]
2025-04-24cleanup: Re-run return_directly.cocciMarkus Armbruster3-13/+3
Coccinelle's indentation of virt_create_plic() results in a long line. Avoid that by mimicking the old indentation manually. Don't touch tests/tcg/mips/user/. I'm not sure these files are ours to make style cleanups on. They might be imported third-party code, which we should leave as is to not complicate future updates. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250407082643.2310002-2-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-23include/system: Move exec/ramblock.h to system/ramblock.hRichard Henderson1-1/+1
Convert the existing includes with sed. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23include/system: Move exec/ioport.h to system/ioport.hRichard Henderson1-1/+1
Convert the existing includes with sed. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23include/system: Move exec/memory.h to system/memory.hRichard Henderson2-2/+2
Convert the existing includes with sed -i ,exec/memory.h,system/memory.h,g Move the include within cpu-all.h into a !CONFIG_USER_ONLY block. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-03tests/qtest: Skip Aarch64 VMapple machinePhilippe Mathieu-Daudé1-0/+1
First, the VMapple machine only works with the ARM 'host' CPU type, which isn't accepted for QTest: $ qemu-system-aarch64 -M vmapple -accel qtest qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF Second, the QTest framework expects machines to be createable without specifying optional arguments, however the VMapple machine requires few of them: $ qemu-system-aarch64 -M vmapple -accel qtest qemu-system-aarch64: No firmware specified $ qemu-system-aarch64 -M vmapple -accel qtest -bios /dev/null qemu-system-aarch64: No AUX device. Please specify one as pflash drive. Restrict this machine with QTest so we can at least run check-qtest, otherwise we get: $ make check-qtest-aarch64 qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF Broken pipe ../tests/qtest/libqtest.c:199: kill_qemu() tried to terminate QEMU process but encountered exit status 1 (expected 0) ... 7/26 qemu:qtest+qtest-aarch64 / qtest-aarch64/test-hmp ERROR 24.71s killed by signal 6 SIGABRT 2/26 qemu:qtest+qtest-aarch64 / qtest-aarch64/qom-test ERROR 71.23s killed by signal 6 SIGABRT Suggested-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250403203241.46692-5-philmd@linaro.org>
2025-03-20rust: Kconfig: Factor out whether HPET is Rust or CPeter Maydell1-2/+1
Currently we require everywhere that wants to know if there is an HPET device to check for "CONFIG_HPET || CONFIG_X_HPET_RUST". Factor out whether the HPET device is Rust or C into a separate Kconfig stanza, so that CONFIG_HPET means "there is an HPET", and whether this has pulled in CONFIG_X_HPET_RUST or CONFIG_HPET_C is something the rest of QEMU can ignore. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Link: https://lore.kernel.org/r/20250319193110.1565578-3-peter.maydell@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-03-13Merge tag 'hw-misc-20250312' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2-0/+44
Misc HW patches - Set correct values for MPC8569E's eSDHC (Zoltan) - Emulate Ricoh RS5C372 RTC device (Bernhard) - Array overflow fixes in SMSC91C111 netdev (Peter) - Fix typo in Xen HVM (Philippe) - Move graphic height/width/depth globals to their own file (Philippe) - Introduce qemu_arch_available() helper (Philippe) - Check fw_cfg's ACPI availability at runtime (Philippe) - Remove virtio-mem dependency on CONFIG_DEVICES (Philippe) - Sort HyperV SYNDBG API definitions (Pierrick) - Remove need for SDHCI_VENDOR_FSL definition (Philippe) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmfRXiMACgkQ4+MsLN6t # wN5zFhAAzSW/hZneD8hycKtr9nBlvZSD72cEt+b656OCbTyyucUi1sG4rMPMvHeW # h6HP6xt2SfQxXbec6Y0pWxWUkBOQzk72s0zpttOED3oEspkrId2D+VSsSH1E+QLh # WoG7/hVgz0bDHexWYIDdGufO4no/icwewAKmC5Kp2HbaNxIIHyWlK1+RO69/lCLN # s3qkNesMsQyEWN28ogEMRqyCIG3oJVP76U4TVcdxIiE51WI8sP8/7V2um0AXN68m # IV3INrfVJjGDp501elrUbD3qsYopRdxoMAvwiVojrLXin6xtS+SQjEe/hcNxzM70 # 0IQPp9WWwLjNkeFlAJF4wpwGJttFNHj+5gtH7/YRrP75jt9kAxPXkFw/OFfpVd30 # NYbeFlWDhRL1QPBs+WPBZTrfD7fRmpfMJRLF3/w61+WvnVrshlyDaoCWbR+L329F # uOQFsBdAD7m/lkZ0mHtskS2vkZx7Itn1av4gql7T7/6cE1R7ItKy1HY9UUCtY6Gp # 7V6XrsAE3khg2HY8IcJ73+sPLQn/GxqZFE7PqmAhgcl6RZEFQv8PNrEgFxCEYyuK # KJjx0hRMLoigp0CEclLfOqz2d3knsI8SJbgD4iTYQc02E69lx8a4XS4N8JXoLEdh # 3i/ndwKEFmzwNuqbU0nYsSJDiAO9ejra8O2BXZS/a4pkxC2jtdw= # =VVr6 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 12 Mar 2025 18:12:51 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250312' of https://github.com/philmd/qemu: hw/sd/sdhci: Remove need for SDHCI_VENDOR_IMX definition hw/hyperv/hyperv-proto: Move SYNDBG definitions from target/i386 hw/virtio/virtio-mem: Remove CONFIG_DEVICES include hw/i386/fw_cfg: Check ACPI availability with acpi_builtin() hw/acpi: Introduce acpi_builtin() helper system: Replace arch_type global by qemu_arch_available() helper system: Extract target-specific globals to their own compilation unit hw/xen/hvm: Fix Aarch64 typo hw/net/smc91c111: Don't allow data register access to overrun buffer hw/net/smc91c111: Use MAX_PACKET_SIZE instead of magic numbers hw/net/smc91c111: Sanitize packet length on tx hw/net/smc91c111: Sanitize packet numbers hw/rtc: Add Ricoh RS5C372 RTC emulation hw/sd/sdhci: Set reset value of interrupt registers Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-03-11hw/rtc: Add Ricoh RS5C372 RTC emulationBernhard Beschow2-0/+44
The implementation just allows Linux to determine date and time. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250223114708.1780-19-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-03-11hw/ssi/pnv_spi: Make bus names distinct for each controllers of a socketChalapathi V1-1/+1
Create a spi buses with distinct names on each socket so that responders are attached to correct SPI controllers. Change the bus name to chipX.spi.<busnum> where X = 0..<num_sockets> QOM tree on a 2 socket machine: (qemu) info qom-tree /machine (powernv10-machine) /chip[0] (power10_v2.0-pnv-chip) /pib_spic[0] (pnv-spi) /chip0.spi.0 (SSI) /xscom-spi[0] (memory-region) /chip[1] (power10_v2.0-pnv-chip) /pib_spic[0] (pnv-spi) /chip1.spi.0 (SSI) /xscom-spi[0] (memory-region) Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com> Message-ID: <20250303141328.23991-4-chalapathi.v@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2025-03-11qtest/xive: Add test of pool interruptsGlenn Miles1-0/+76
Added new test for pool interrupts. Removed all printfs from pnv-xive2-* qtests. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2025-03-11qtest/xive: Change printf to g_test_messageGlenn Miles3-17/+18
Change all printf() in pnv-xive2-* qtests to g_test_message() [npiggin: split from pool qtest] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2025-03-11ppc/xive2: Add support for MMIO operations on the NVPG/NVC BARFrederic Barrat4-1/+159
Add support for the NVPG and NVC BARs. Access to the BAR pages will cause backlog counter operations to either increment or decriment the counter. Also added qtests for the same. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2025-03-11qtest/xive: Add group-interrupt testFrederic Barrat1-0/+160
Add XIVE2 tests for group interrupts and group interrupts that have been backlogged. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Michael Kowal <kowal@linux.ibm.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2025-03-11ppc/ppc405: Remove testsCédric Le Goater2-6/+0
Since we are about to remove all support for PPC 405, start by removing the tests referring to the ref405ep machine. Link: https://lore.kernel.org/qemu-devel/20250110141800.1587589-2-clg@redhat.com Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Message-ID: <20250204080649.836155-2-clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2025-03-05tests/qtest/ufs-test: Add test code for the temperature featureKeoseong Park1-0/+24
This commit adds tests to verify the correctness of query attribute results related to the temperature feature. It ensures that querying temperature attributes returns expected values. Signed-off-by: Keoseong Park <keosung.park@samsung.com> Acked-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Jeuk Kim <jeuk20.kim@samsung.com> Message-ID: <20250225064243epcms2p8b7b59e7bf381bd68d30a6f59b40dea9f@epcms2p8> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-02-25tests/qtest/qom-test: Test retrieval of machine class propertiesThomas Huth1-0/+11
There were recently some crashes that occurred when trying to retrieve the properties of machines. Let's add a test to avoid regression here. Message-ID: <20250123204956.1561463-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-02-22Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi1-2/+0
into staging virtio,pc,pci: features, fixes, cleanups Features: SR-IOV emulation for pci virtio-mem-pci support for s390 interleave support for cxl big endian support for vdpa svq new QAPI events for vhost-user Also vIOMMU reset order fixups are in. Fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAme4b8sPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpHKcIAKPJsVqPdda2dJ7b7FdyRT0Q+uwezXqaGHd4 # 7Lzih1wsxYNkwIAyPtEb76/21qiS7BluqlUCfCB66R9xWjP5/KfvAFj4/r4AEduE # fxAgYzotNpv55zcRbcflMyvQ42WGiZZHC+o5Lp7vDXUP3pIyHrl0Ydh5WmcD+hwS # BjXvda58TirQpPJ7rUL+sSfLih17zQkkDcfv5/AgorDy1wK09RBKwMx/gq7wG8yJ # twy8eBY2CmfmFD7eTM+EKqBD2T0kwLEeLfS/F/tl5Fyg6lAiYgYtCbGLpAmWErsg # XZvfZmwqL7CNzWexGvPFnnLyqwC33WUP0k0kT88Y5wh3/h98blw= # =tej8 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 21 Feb 2025 20:21:31 HKT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (41 commits) docs/devel/reset: Document reset expectations for DMA and IOMMU hw/vfio/common: Add a trace point in vfio_reset_handler hw/arm/smmuv3: Move reset to exit phase hw/i386/intel-iommu: Migrate to 3-phase reset hw/virtio/virtio-iommu: Migrate to 3-phase reset vhost-user-snd: correct the calculation of config_size net: vhost-user: add QAPI events to report connection state hw/virtio/virtio-nsm: Respond with correct length vdpa: Fix endian bugs in shadow virtqueue MAINTAINERS: add more files to `vhost` cryptodev/vhost: allocate CryptoDevBackendVhost using g_mem0() vhost-iova-tree: Update documentation vhost-iova-tree, svq: Implement GPA->IOVA & partial IOVA->HVA trees vhost-iova-tree: Implement an IOVA-only tree amd_iommu: Use correct bitmask to set capability BAR amd_iommu: Use correct DTE field for interrupt passthrough hw/virtio: reset virtio balloon stats on machine reset mem/cxl_type3: support 3, 6, 12 and 16 interleave ways hw/mem/cxl_type3: Ensure errp is set on realization failure hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-21tests/qtest/vhost-user-test: Use modern virtio for vhost-user testsThomas Huth1-1/+2
All other vhost-user tests here use modern virtio, too, so let's adjust the vhost-user-net test accordingly. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250203124346.169607-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-02-20qtest/libqos/pci: Do not write to PBA memoryNicholas Piggin1-2/+0
The PCI Local Bus Specification says the result of writes to MSI-X PBA memory is undefined. QEMU implements them as no-ops, so remove the pointless write from qpci_msix_pending(). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20250117172244.406206-2-npiggin@gmail.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.1 at 2025-09-19 11:43:56 +0000