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2025-02-17tests/qtest/ufs-test: Add test code for MCQ functionalityJeuk Kim1-29/+142
This patch tests whether MCQ initialization and basic read-write operations work correctly when the MCQ parameter of hw/ufs is enabled. Acked-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com>
2025-02-17tests/qtest/ufs-test: Prepare for MCQ testJeuk Kim1-267/+295
In legacy doorbell mode, the command descriptor slot matched the UTRD slot. To maintain consistency in MCQ mode, command descriptor slot allocation and deallocation now use a bitmap-based approach. Acked-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com>
2025-02-17tests/qtest/ufs-test: Cleanup unused codeJeuk Kim1-10/+1
Removed dead code related to the unimplemented task management request. Acked-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Jeuk Kim <jeuk20.kim@samsung.com>
2025-02-14tests/qtest/migration: Add a cancel testFabiano Rosas1-0/+176
The qmp_migrate_cancel() command is poorly tested and code inspection reveals that there might be concurrency issues with its usage. Add a test that runs a migration and calls qmp_migrate_cancel() at specific moments. In order to make the test more deterministic, instead of calling qmp_migrate_cancel() at random moments during migration, do it after the migration status change events are seen. The expected result is that qmp_migrate_cancel() on the source ends migration on the source with the "cancelled" state and ends migration on the destination with the "failed" state. The only exception is that a failed migration should continue in the failed state. Cancelling is not allowed during postcopy (no test is added for this because it's a trivial check in the code). Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20250213175927.19642-9-farosas@suse.de> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-14tests/qtest/migration: Introduce migration_test_add_suffixFabiano Rosas2-0/+26
Introduce a new migration_test_add_suffix to allow programmatic creation of tests based on a suffix. Pass the test name into the test so it can know which variant to run. Reviewed-by: Peter Xu <peterx@redhat.com> Message-ID: <20250213175927.19642-8-farosas@suse.de> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-13i386: enable rust hpet for pc when rust is enabledZhao Liu1-1/+2
Add HPET configuration in PC's Kconfig options, and select HPET device (Rust version) if Rust is supported. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250210030051.2562726-11-zhao1.liu@intel.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-02-10Merge tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of ↵Stefan Hajnoczi13-31/+126
https://gitlab.com/stsquad/qemu into staging testing and gdbstub updates: - add a check-rust test to docker builds - re-factor the qtest logic to be cleaner - fix tests to not clock_step when no timers enabled - roll-up log prefix into qtest_send - cleaner error reporting when qtest_clock_set fails - revert old deadlock fix now tests are updated - only run full set of migration tests under HW acceleration - support late attachment to user-mode gdbstubs # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmeqBSsACgkQ+9DbCVqe # KkQS/Af+K0hpdGc1msiuMsqmuESBvhoQniYZFLN1/pwe2KpG8i/+fq2fsCuxJhJ1 # 2TzPH7aj54p9MGCZf2k9JLhO22XldN+oezZMc1crhoWK0AtrWhnLs58I2oEPIsUo # NmGO6Zfm98ge89o2y8GCvd0QXAtUf+jduDKnW0mfnOnw+w/mky5KzWS7/1091VGW # 42LSY4KnqgdLSqLyuLBOrgADEjB1ChWS4/bSC+kEYSGrmNQB+n1KeIzzlJBGpOr0 # Z9yzmhMCm7TWdkFNPmnVfYH/7ZUNcpv6PtQSpkku4f6b/gybyvJBknHpM4i+Gpb5 # 87wSjljrCpdNm/9KFRjiJuUWdS/jCg== # =UF0n # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 08:54:51 EST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of https://gitlab.com/stsquad/qemu: tests/tcg: Add late gdbstub attach test docs/user: Document the %d placeholder and suspend=n QEMU_GDB features gdbstub: Allow late attachment osdep: Introduce qemu_kill_thread() user: Introduce host_interrupt_signal user: Introduce user/signal.h gdbstub: Try unlinking the unix socket before binding gdbstub: Allow the %d placeholder in the socket path tests/qtest/migration: Pick smoke tests tests/qtest/migration: Add --full option Revert "util/timer: avoid deadlock when shutting down" tests/qtest: tighten up the checks on clock_step tests/qtest: rename qtest_send_prefix and roll-up into qtest_send tests/qtest: simplify qtest_process_inbuf tests/qtest: don't step clock at start of npcm7xx periodic IRQ test tests/qtest: don't attempt to clock_step while waiting for virtio ISR tests/docker: replicate the check-rust-tools-nightly CI job Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10qapi: Move include/qapi/qmp/ to include/qobject/Daniel P. Berrangé63-99/+629
The general expectation is that header files should follow the same file/path naming scheme as the corresponding source file. There are various historical exceptions to this practice in QEMU, with one of the most notable being the include/qapi/qmp/ directory. Most of the headers there correspond to source files in qobject/. This patch corrects most of that inconsistency by creating include/qobject/ and moving the headers for qobject/ there. This also fixes MAINTAINERS for include/qapi/qmp/dispatch.h: scripts/get_maintainer.pl now reports "QAPI" instead of "No maintainers found". Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> #s390x Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20241118151235.2665921-2-armbru@redhat.com> [Rebased]
2025-02-10tests/qtest/migration: Pick smoke testsFabiano Rosas8-31/+67
Choose a few tests per group and move them from the full set to the smoke set. Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20250130184012.5711-3-farosas@suse.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-10-alex.bennee@linaro.org>
2025-02-10tests/qtest/migration: Add --full optionFabiano Rosas10-1/+65
Add a new command line option to allow selecting between running the full set of tests or a smaller set of tests. The default will be to run the small set (i.e. no comand line option provided) so we can reduce the amount of tests run by default. Only hosts which support KVM for the target architecture being tested will run the complete set of tests. Adjust the meson.build file to pass in the --full option when appropriate. (for now, set the option unconditionally until the next patch actually creates the small set) Use cases: configure --target-list=aarch64-softmmu,ppc64-softmmu,s390x-softmmu,x86_64-softmmu | before - 615s/244 tests | after - 244s/100 tests ------------------------+--------------------------+----------------------------- make check | full set for all archs | full set for the KVM arch, make check-qtest | | small set for the rest | | qemu-system-$ARCH | full set for $ARCH | small set for $ARCH, KVM or ./migration-test | | TCG automatically chosen | | qemu-system-$ARCH | N/A | full set for $ARCH, KVM or ./migration-test --full | | TCG automatically chosen | | migration-compat-x86_64 | full set for x86_64 | small set for x86_64 CI job | | ------------------------+--------------------------+----------------------------- Signed-off-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20250130184012.5711-2-farosas@suse.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-9-alex.bennee@linaro.org>
2025-02-10tests/qtest: don't step clock at start of npcm7xx periodic IRQ testAlex Bennée1-1/+0
Until there are timers enabled the semantics of clock_step_next() will fail. Since d524441a36 (system/qtest: properly feedback results of clock_[step|set]) we will signal a FAIL if time doesn't advance. Reviewed-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-4-alex.bennee@linaro.org>
2025-02-10tests/qtest: don't attempt to clock_step while waiting for virtio ISRAlex Bennée2-8/+4
This replicates the changes from 92cb8f8bf6 (tests/qtest: remove clock_steps from virtio tests) as there are no timers in the virtio code. We still busy wait and timeout though. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-3-alex.bennee@linaro.org>
2025-02-03tests/qtest/vhost-user-test: Use modern virtio for vhost-user testsThomas Huth1-1/+2
All other vhost-user tests here use modern virtio, too, so let's adjust the vhost-user-net test accordingly. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20250203124346.169607-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-03tests/qtest: Make qtest_has_accel() genericPhilippe Mathieu-Daudé1-11/+10
Since commit b14a0b7469f ("accel: Use QOM classes for accel types") accelerators are registered as QOM objects. Use QOM as a generic API to query for available accelerators. This is in particular useful to query hardware accelerators such HFV, Xen or WHPX which otherwise have their definitions poisoned in "exec/poison.h". Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250130103728.536-3-philmd@linaro.org> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-03tests/qtest: Extract qtest_qom_has_concrete_type() helperPhilippe Mathieu-Daudé1-38/+51
Extract qtest_qom_has_concrete_type() out of qtest_has_device() in order to re-use it in the following commit. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250130103728.536-2-philmd@linaro.org> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-03tests/qtest/vmcoreinfo: add a unit test to exercize basic vmcoreinfo functionAni Sinha2-0/+91
A new qtest is written that exercizes the fw-cfg DMA based read and write ops to write values into vmcoreinfo fw-cfg file and read them back and verify that they are the same. Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-ID: <20250120043847.954881-4-anisinha@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-03tests/qtest/libqos: add DMA support for writing and reading fw_cfg filesAni Sinha2-1/+144
At present, the libqos/fw_cfg.c library does not support the modern DMA interface which is required to write to the fw_cfg files. It only uses the IO interface. Implement read and write methods based on DMA. This will enable developers to add tests that writes to the fw_cfg file(s). The structure of the code is taken from edk2 fw_cfg implementation. It has been tested by writing a qtest that writes to a fw_cfg file. Signed-off-by: Ani Sinha <anisinha@redhat.com> Message-ID: <20250120043847.954881-3-anisinha@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-03libqos/fw_cfg: refactor file directory iteraton to make it more reusableAni Sinha1-23/+40
fw-cfg file directory iteration code can be used by other functions that may want to implement fw-cfg file operations. Refactor it into a smaller helper so that it can be reused. No functional change. Signed-off-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250120043847.954881-2-anisinha@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-02-02Merge tag 'hw-misc-20250131' of https://github.com/philmd/qemu into stagingStefan Hajnoczi2-2/+6
Misc HW patches - Remove uses of &first_cpu in rx-gdbsim and loongson3_virt machines (Philippe) - Convert few legacy qemu_allocate_irqs to qemu_init_irqs (Philippe) - Add tracing events in i2c-echo device (Titus) - Fix debug format string in USB EHCI (Zoltan) - Rework loader API to remove its target_words_bigendian() call (Philippe) - QOMify OMAP MMC device (Peter) - Remove legacy SD Card APIs (Peter) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmedOmkACgkQ4+MsLN6t # wN4qHhAAtL3vmk6hQgKD76bSaB3CDEdHsnS7qqeRVVmbr7pQL9D6yyXzkjJBzZtk # nG7ubhoS5WFeKswzD8tY/mgP25hntnq38TNrRxDrpRNdFYF+a2cncpRGfgzk0z/9 # nme/BuUx6fNowV8MVGLNOLvaDCeDHl9biTLJmcQyqwlHy9l9Wi6DSa6Xi9ZQWlHi # fxYVeuQ7HYlKwhiu3mqpfNeauIgMSWz8V48ETCrFnjMWmiF1k1L0GccWDS8zpPDk # QkdOxHC4eVMxk0d2458eUXeqo/izfzoc7Z9hW6W8cyI69y4m011xqANd/udTS03E # HMcG9Ks0E+Yw8NGoErOP7zu8yFVEzCn2BKhH/wrUHBC2UfP99vNR/b8LNkg25y19 # IItOkMban0Oyr9KaNb1Ga+3pZIsyyil+shSYNHpWkfqk+TUpZkMUSaVHA9r1oB3V # u/dOO/lPLaWMvftKVXRl3K/Lfz4WF5cWjza5RratnzbBqqwr03CwjjBEuZIX/5ww # ATj/fV10OSHScxCqauYp8uuNSgEOKaJCJe2uEMaLvxn/O9ka0FQZ5CLUJ0yIKs/t # Tg4sS0QLgmpaXwSnscKoVE7aHWNFT1WomHI4SjWbwUQhmm0DmPizBZ2yX8dnSR24 # ubtzmxNYFWScrUTGQvbMhkU6I+Sc0Ca8APmPxErNV2mzF4p3CPE= # =Jvwi # -----END PGP SIGNATURE----- # gpg: Signature made Fri 31 Jan 2025 16:02:33 EST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20250131' of https://github.com/philmd/qemu: (36 commits) hw/sd: Remove unused SDState::enable hw/sd: Remove unused legacy functions, stop killing mammoths hw/sd: Remove unused 'enable' method from SDCardClass hw/sd/omap_mmc: Untabify hw/sd/omap_mmc: Remove unused coverswitch qemu_irq hw/arm/omap1: Inline creation of MMC hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devices hw/sd/omap_mmc: Convert to SDBus API hw/sd/omap_mmc: Convert output qemu_irqs to gpio and sysbus IRQ APIs hw/sd/omap_mmc: Convert remaining 'struct omap_mmc_s' uses to OMAPMMCState hw/sd/omap_mmc: Do a minimal conversion to QDev hw/loader: Pass ELFDATA endian order argument to load_elf() hw/loader: Pass ELFDATA endian order argument to load_elf_as() hw/loader: Pass ELFDATA endian order argument to load_elf_ram_sym() hw/loader: Clarify local variable name in load_elf_ram_sym() hw/loader: Remove unused load_elf_ram() hw/avr/boot: Replace load_elf_ram_sym() -> load_elf_as() hw/usb/hcd-ehci: Fix debug printf format string hw/misc/i2c-echo: add tracing hw/char/pci-multi: Convert legacy qemu_allocate_irqs to qemu_init_irq ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-31hw/ipack: Clarify KConfig symbolsPhilippe Mathieu-Daudé2-2/+6
Split IPACK Kconfig key as {IPACK, TPCI200, IP_OCTAL_232} - IPack is a bus - TPCI200 is a PCI device providing an IPack bus - IP-Octal232 is an IPack device plugged on an IPack bus Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Fabiano Rosas <farosas@suse.de> Message-Id: <20250121155526.29982-3-philmd@linaro.org>
2025-01-30Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingStefan Hajnoczi1-1/+1
trivial patches for 2025-01-30 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEZKoqtTHVaQM2a/75gqpKJDselHgFAmebf70ACgkQgqpKJDse # lHgmWw/8DZXr5+Aar9FJZIUZWqxBxRzNjnvKEGQPCKI+Iqi3qkwOHij3Tr06vERM # upWZ/6Gx6v8SFjlfCv4VvtAHwflLOFqBzDxrCRDiZqNuLDaXuLnTMF1H8teg4ciM # 7uPjvI17LDgoBEDR27divxcLcP4dDI5RMkAndzyL1U9OGugO4vgmDUAuXkNzqBFS # tnWQmay3VTDVNtd4YJvhqJM5UR/4mSHlISlZpbzpF2Pxd2Job6IHYEzmre+0iteQ # TukjKkSQ7os7jEV984zVmwZnqCZrq6iIjX0nY6d1wWeDLjRMzLNqHuZ7jYVYDMWr # G/HdXp7BfGW1kG67W86MWWVW6O96DsyN5e76pMdlu8DjDs1/hiTA02cUEa2x2Alw # 3ngblJMC2JhvmuMLZStJf3zTb1GABijQJdfEYjUJ1FEY0dhVuK5teeTRjql7xjnw # tHtaxn11ahifZ++kRAeZyinkkUlKLOcV8xoGqmv8uRjy6XepFASFkSj/jEbyohKF # BGGvUVT1cp0Krr9TOAEnrhYEpXgHjxsR0PqTphH1wQojr/AyYTBwSy/wGWPbMvQQ # u/hHoJ/RgiiSf5HW/PRUbWrTdgYPg8Ej/9n7geAZSk2e9hfGI6Ii88XOmrZefQ+4 # 2GQ+a3I2n4LQ1cyzrGZgUncwLClIpqN/WtRsUNEFQs6zrcvG52U= # =2d/y # -----END PGP SIGNATURE----- # gpg: Signature made Thu 30 Jan 2025 08:33:49 EST # gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478 # gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [unknown] # gpg: aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E # Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: hw/i386/pc: Remove unused pc_compat_2_3 declarations licenses: Remove SPDX tags not being license identifier for Linaro tests/functional/test_mips_malta: Fix comment about endianness of the test gdbstub/user-target: fix gdbserver int format (%d -> %x) vvfat: create_long_filename: fix out-of-bounds array access net/dump: Correctly compute Ethernet packet offset net: Fix announce_self Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-30licenses: Remove SPDX tags not being license identifier for LinaroPhilippe Mathieu-Daudé1-1/+1
Per [*]: "we're only interested in adopting SPDX for recording the licensing info, [not] any other SPDX metadata." Replace the 'SPDX-FileCopyrightText' and 'SPDX-FileContributor' tags added by Linaro by 'Copyright (c)' and 'Authors' words respectively. [*] https://lore.kernel.org/qemu-devel/20241007154548.1144961-4-berrange@redhat.com/ Inspired-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-01-29migration: Always set DEVICE statePeter Xu1-1/+2
DEVICE state was introduced back in 2017: https://lore.kernel.org/qemu-devel/20171020090556.18631-1-dgilbert@redhat.com/ Quote from Dave's cover letter, when the pre-switchover phase was enabled, the state transition looks like this: The precopy flow is: active->pre-switchover->device->completed The postcopy flow is: active->pre-switchover->postcopy-active->completed To supplement above, when the cap is not enabled: The precopy flow is: active->completed The postcopy flow is: active->postcopy-active->completed It works for us, though we have some code just to special case these state transitions, so the DEVICE state currently is special only to precopy, and only conditionally. I had a quick discussion with Libvirt developers, it turns out that this may not be necessary. IOW, it seems okay we can have DEVICE state to be generic, so that we don't have over-complicated state machines. It not only helps align all the migration state machine, help cleanup the code path especially on pre-switchover handling (see the patch itself), another side benefit is we can unconditionally have a specific state to mark the switchover phase, which might be helpful for debugging too. This patch makes the DEVICE state to be present always, marking that source QEMU is switching over. Then the state machine will be always as simple as: active-> [pre-switchover->] -> device -> [postcopy-active->] -> complete After the change, no matter whether pre-switchover or postcopy is enabled or not, we always have DEVICE state showing the switchover phase. When pre-switchover enabled, we'll have an extra stage before that. When postcopy is enabled, we'll have an extra stage after that. A few qtests need touch up in QEMU tree for this change: - A few iotest outputs (194, 203, 234, 262, 280) - Teach libqos's migrate() on "device" state Cc: Jiri Denemark <jdenemar@redhat.com> Cc: Daniel P. Berrangé <berrange@redhat.com> Cc: Dr. David Alan Gilbert <dave@treblig.org> Signed-off-by: Peter Xu <peterx@redhat.com> Tested-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Juraj Marcin <jmarcin@redhat.com> Link: https://lore.kernel.org/r/20250114230746.3268797-15-peterx@redhat.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29migration-test: cpr-transferSteve Sistare3-0/+88
Add a migration test for cpr-transfer mode. Defer the connection to the target monitor, else the test hangs because in cpr-transfer mode QEMU does not listen for monitor connections until we send the migrate command to source QEMU. To test -incoming defer, send a migrate incoming command to the target, after sending the migrate command to the source, as required by cpr-transfer mode. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1736967650-129648-24-git-send-email-steven.sistare@oracle.com [only allocate in_channels when needed] Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29tests/qtest: assert qmp connectedSteve Sistare1-0/+4
Assert that qmp_fd is valid when we communicate with the monitor. Suggested-by: Peter Xu <peterx@redhat.com> Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Link: https://lore.kernel.org/r/1736967650-129648-23-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29tests/qtest: enhance migration channelsSteve Sistare6-25/+76
Change the migrate_qmp and migrate_qmp_fail channels argument to a QObject type so the caller can manipulate the object before passing it to the helper. Define migrate_str_to_channel to aid such manipulation. Add a channels argument to migrate_incoming_qmp. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1736967650-129648-22-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29migration-test: defer connectionSteve Sistare2-3/+22
Add an option to defer connection to the target monitor, needed by the cpr-transfer test. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/1736967650-129648-21-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29tests/qtest: defer connectionSteve Sistare3-40/+90
Add an option to defer making the connecting to the monitor and qtest sockets when calling qtest_init_with_env. The client makes the connection later by calling qtest_connect and qtest_qmp_handshake. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1736967650-129648-20-git-send-email-steven.sistare@oracle.com [plumb capabilities list into qtest_qmp_handshake] Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29tests/qtest: optimize migrate_set_portsSteve Sistare1-8/+15
Do not query connection parameters if all port numbers are known. This is more efficient, and also solves a problem for the cpr-transfer test. At the point where cpr-transfer calls migrate_qmp and migrate_set_ports, the monitor is not connected and queries are not allowed. Port=0 is never used for cpr-transfer. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/1736967650-129648-19-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-29migration-test: memory_backendSteve Sistare2-4/+16
Allow each migration test to define its own memory backend, replacing the standard "-m <size>" specification. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/1736967650-129648-18-git-send-email-steven.sistare@oracle.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-18Merge tag 'qtest-20250117-pull-request' of https://gitlab.com/farosas/qemu ↵Stefan Hajnoczi8-24/+155
into staging Qtest pull request - RISCV CSR test - migration recover changed to OOB - removal of dead code in test-x86-cpuid-compat # -----BEGIN PGP SIGNATURE----- # # iQJEBAABCAAuFiEEqhtIsKIjJqWkw2TPx5jcdBvsMZ0FAmeKbx4QHGZhcm9zYXNA # c3VzZS5kZQAKCRDHmNx0G+wxnRD7D/9v4ovvGn/IwSXjjpOpkjhCSgV8TMi1F61P # hqB5TTCY8yejvT7JauplMUHmcJsVCNx+HF36D+YjxBjqrhQE8vzPRXgcLxHL9RX4 # Kwgdk24kFKADE3gsiys9gOpwRhmtY0/2CT5LvitfJRMxUNPtm0Mr7qM3Z0Taeusu # lxZgIMTBeNakpY5vua8nlLQ4r+/Df6S3TFFAaQ4UYab/T5zHVcjKaySXDlT1QXpp # M+Be21jPxuUYJnKCSxMCUtuY9wkSPcITzJW91V+JxL9STSpsKpnQe10JWDRbwLBt # /am2Jg5f8iFEblCwr5aQRMwXB+e/Y7K4qKPOUalj+weGnCXh9DmWPXnV6qzdZNO8 # sePKoFj1AMtqbVf3iOpDBRkH8dECiDh1jHmflW1grF0BuOwOw8dKYW+i2qz9ZDiW # rKWKfRcZZ059aOCQWqpMC9TGQ8osMC/v6GGJwiPBDLapGjnAm5d1683w4Z1l8tAg # vf9yti2mpzK15PB6doEj/IuZr8WKWFMklizmMMZpXgHIUpjtm3JFKXX/jGHcD3KU # E8F4ns3zPMlq7ncIwc6GADRB3XzEuzzuXAaEO8HMN0fYHevfnFIon749udyBDI/n # a1/CTzTmchItwzgpdvcoiKO6gkg6DO9n08QULCMPSVCtl5KAlz5yuwxWGI/rM6u7 # ixPi8i24oA== # =i4AD # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Jan 2025 09:54:22 EST # gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D # gpg: issuer "farosas@suse.de" # gpg: Good signature from "Fabiano Rosas <farosas@suse.de>" [unknown] # gpg: aka "Fabiano Almeida Rosas <fabiano.rosas@suse.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D * tag 'qtest-20250117-pull-request' of https://gitlab.com/farosas/qemu: tests/qtest/test-x86-cpuid-compat: Remove tests related to pc-i440fx-2.3 tests/qtest/migration: Use out-of-band execution for migrate-recover tests/qtest: Introduce qtest_init_with_env_and_capabilities() tests/qtest: QTest example for RISC-V CSR register target/riscv: Add RISC-V CSR qtest support Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-17tests/qtest/test-x86-cpuid-compat: Remove tests related to pc-i440fx-2.3Thomas Huth1-18/+0
The pc-i440fx-2.3 machine type has been removed in commit 46a2bd5257 ("hw/i386/pc: Remove deprecated pc-i440fx-2.3 machine") already, so these tests are just dead code by now. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Link: https://lore.kernel.org/r/20250117102738.59714-2-thuth@redhat.com Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-17tests/qtest/migration: Use out-of-band execution for migrate-recoverJuraj Marcin3-3/+24
In real use cases, the migrate-recover command requires out-of-band execution, because the thread processing normal commands is blocked by a page fault in the guest memory. With this change, the tests will be closer to real use cases and could help detect regressions and other bugs in migration recovery. Signed-off-by: Juraj Marcin <jmarcin@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-17tests/qtest: Introduce qtest_init_with_env_and_capabilities()Juraj Marcin2-2/+33
This patch adds a new version of qtest_init_with_env() that allows specifying QMP capabilities that should be enabled during handshake. This is useful for example if a test needs out-of-band execution of QMP commands, it can initialize with the oob capability. Signed-off-by: Juraj Marcin <jmarcin@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-17tests/qtest: QTest example for RISC-V CSR registerIvan Klokov2-1/+57
Added demo for reading CSR register from qtest environment. Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-17target/riscv: Add RISC-V CSR qtest supportIvan Klokov2-0/+41
The RISC-V architecture supports the creation of custom CSR-mapped devices. It would be convenient to test them in the same way as MMIO-mapped devices. To do this, a new call has been added to read/write CSR registers. Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com> Acked-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Fabiano Rosas <farosas@suse.de>
2025-01-17tests/qtest: fix some copy and paste errors in kdocAlex Bennée2-4/+4
A number of copy and paste kdoc comments are referring to the wrong definition. Fix those cases. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-29-alex.bennee@linaro.org>
2025-01-15tests: acpi: update expected blobsIgor Mammedov1-40/+0
_DSM function 7 AML should have followig change: If ((Arg2 == 0x07)) { - Local0 = Package (0x02) - { - Zero, - "" - } Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One] )) - Local0 [Zero] = Local2 + Local0 = Package (0x02) {} + If (!((Local2 == Zero) || (Local2 == 0xFFFFFFFF))) + { + Local0 [Zero] = Local2 + Local0 [One] = "" + } + Return (Local0) } } Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250115125342.3883374-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: whitelist expected blobsIgor Mammedov1-0/+40
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20250115125342.3883374-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests/qtest: Add intel-iommu testZhenzhong Duan2-0/+65
Add the framework to test the intel-iommu device. Currently only tested cap/ecap bits correctness when x-flts=on in scalable mode. Also tested cap/ecap bits consistency before and after system reset. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20241212083757.605022-21-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests/acpi: q35: Update host address width in DMARZhenzhong Duan1-1/+0
Differences: @@ -1,39 +1,39 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20200925 (64-bit version) * Copyright (c) 2000 - 2020 Intel Corporation * - * Disassembly of tests/data/acpi/x86/q35/DMAR.dmar, Mon Nov 11 15:31:18 2024 + * Disassembly of /tmp/aml-SPJ4W2, Mon Nov 11 15:31:18 2024 * * ACPI Data Table [DMAR] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "DMAR" [DMA Remapping table] [004h 0004 4] Table Length : 00000078 [008h 0008 1] Revision : 01 -[009h 0009 1] Checksum : 15 +[009h 0009 1] Checksum : 0C [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 -[024h 0036 1] Host Address Width : 26 +[024h 0036 1] Host Address Width : 2F [025h 0037 1] Flags : 01 [026h 0038 10] Reserved : 00 00 00 00 00 00 00 00 00 00 [030h 0048 2] Subtable Type : 0000 [Hardware Unit Definition] [032h 0050 2] Length : 0040 [034h 0052 1] Flags : 00 [035h 0053 1] Reserved : 00 [036h 0054 2] PCI Segment Number : 0000 [038h 0056 8] Register Base Address : 00000000FED90000 [040h 0064 1] Device Scope Type : 03 [IOAPIC Device] [041h 0065 1] Entry Length : 08 [042h 0066 2] Reserved : 0000 [044h 0068 1] Enumeration ID : 00 [045h 0069 1] PCI Bus Number : FF Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com> Message-Id: <20241212083757.605022-18-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests/acpi: q35: allow DMAR acpi table changesZhenzhong Duan1-0/+1
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20241212083757.605022-16-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: update expected blobsIgor Mammedov1-42/+0
previous patch has changed cpu hotplug AML, expected diff: @@ -2942,6 +2942,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) { Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) Name (CNEW, Package (0xFF) {}) + Name (CEJL, Package (0xFF) {}) Local3 = Zero Local4 = One While ((Local4 == One)) @@ -2949,6 +2950,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Local4 = Zero Local0 = One Local1 = Zero + Local5 = Zero While (((Local0 == One) && (Local3 < One))) { Local0 = Zero @@ -2959,7 +2961,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Break } - If ((Local1 == 0xFF)) + If (((Local1 == 0xFF) || (Local5 == 0xFF))) { Local4 = One Break @@ -2972,10 +2974,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Local1++ Local0 = One } - ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + + If ((\_SB.PCI0.PRES.CRMV == One)) { - CTFY (Local3, 0x03) - \_SB.PCI0.PRES.CRMV = One + CEJL [Local5] = Local3 + Local5++ Local0 = One } @@ -2992,6 +2995,16 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) \_SB.PCI0.PRES.CINS = One Local2++ } + + Local2 = Zero + While ((Local2 < Local5)) + { + Local3 = DerefOf (CEJL [Local2]) + CTFY (Local3, 0x03) + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CRMV = One + Local2++ + } } Release (\_SB.PCI0.PRES.CPLK) Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241210163945.3422623-4-imammedo@redhat.com> Tested-by: Eric Mackay <eric.mackay@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-15tests: acpi: whitelist expected blobsIgor Mammedov1-0/+42
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20241210163945.3422623-2-imammedo@redhat.com> Tested-by: Eric Mackay <eric.mackay@oracle.com> Acked-by: Ani Sinha <anisinha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-01-13tests: Add functional tests for HPPA machinesPhilippe Mathieu-Daudé2-3/+1
Add quick firmware boot tests (less than 1sec) for the B160L (32-bit) and C3700 (64-bit) HPPA machines: $ make check-functional-hppa ... 4/4 qemu:func-quick+func-hppa / func-hppa-hppa_seabios OK 0.22s 2 subtests passed Remove the duplicated B160L test in qtest/boot-serial-test.c. Suggested-by: Helge Deller <deller@gmx.de> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Helge Deller <deller@gmx.de> Tested-by: Helge Deller <deller@gmx.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250102100340.43014-3-philmd@linaro.org>
2025-01-13tests/qtest/boot-serial-test: Correct HPPA machine namePhilippe Mathieu-Daudé1-1/+1
Commit 7df6f751176 ("hw/hppa: Split out machine creation") renamed the 'hppa' machine as 'B160L', but forgot to update the boot serial test, which ended being skipped. Cc: qemu-stable@nongnu.org Fixes: 7df6f751176 ("hw/hppa: Split out machine creation") Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250102100340.43014-2-philmd@linaro.org>
2025-01-13tests/qtest/libqos: Reuse TYPE_IMX_I2C defineBernhard Beschow2-4/+5
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Message-ID: <20250108092538.11474-12-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-01-13hw/ufs: Adjust value to match CPU's endian formatKeoseong Park1-1/+1
In ufs_write_attr_value(), the value parameter is handled in the CPU's endian format but provided in big-endian format by the caller. Thus, it is converted to the CPU's endian format. The related test code is also fixed to reflect this change. Fixes: 7c85332a2b3e ("hw/ufs: minor bug fixes related to ufs-test") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Keoseong Park <keosung.park@samsung.com> Reviewed-by: Jeuk Kim <jeuk20.kim@samsung.com> Message-ID: <20250107084356epcms2p2af4d86432174d76ea57336933e46b4c3@epcms2p2> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-01-13Merge tag 'pull-target-arm-20250113' of ↵Stefan Hajnoczi2-13/+25
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/arm_sysctl: fix extracting 31th bit of val * hw/misc: cast rpm to uint64_t * tests/qtest/boot-serial-test: Improve ASM * target/arm: Move minor arithmetic helpers out of helper.c * target/arm: change default pauth algorithm to impdef # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmeFGuUZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mFPEAChT9DR/+bNSt0Q28TsCv84 # dMMXle7c821NHTNeP/uBQ0i3aopmOJE145wMSoZza8l+EYjOdQwHpinjfu8J/rOS # mJUgAFRcgUoH77+k0p0x1tqKi7+669TznOMOF4RyudKju5SteVyOGgLNjzJlnItq # 3QRBiDTS+qXqAUhgQtzcuY6Xl5M2KA/cpSWYxQf/JPpZMX2c37V8AlSF/1GkLo6Z # 3afrasXUp+U0+03Pe3Ffknzx/LtkLc2hg2LVX8CeqMLRJSA0ohkSwa/xax+2hn+G # 9fKn92IpQOjEFw6qBTBvkerP2hr6yhDFTVFI9v+lsY4bf7tQGIE75HEGZ1EMr26b # LCIPSQvez9exZl/usLGkUq9MWAiEkhBMy99ajwg5X4IhcbS+oyFtH2teYpt9rd9N # 2dVS5qzErN7TCZQza9A7+bt8v5OtbJk2K8Qx9QhMFU/dIUSp0vOA3NwGu+qkciAb # wNdoXT22Hy0czDiQ/ln3aocmwWeVZN4+AxKNoigQhor+5oIR4lMn1P7yAmsCLeL8 # AaLXJdR4aLnYugh23qzv9wf9kAbxRBMvLbsNTKGG00DYQ0xoY4pQ2CmPAJoVVxpU # FjRydG9sC/6sMoJiOoDVpPW003VY2If8r0ObzqUd2gkw1HLf12yug+lij0LkcXKC # Au7ycaoHiTlluNxyQjsgPg== # =FGfo # -----END PGP SIGNATURE----- # gpg: Signature made Mon 13 Jan 2025 08:53:41 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250113' of https://git.linaro.org/people/pmaydell/qemu-arm: docs/system/arm/virt: mention specific migration information target/arm: change default pauth algorithm to impdef tests/tcg/aarch64: force qarma5 for pauth-3 test target/arm: add new property to select pauth-qarma5 target/arm: Move minor arithmetic helpers out of helper.c tests/qtest/boot-serial-test: Initialize PL011 Control register tests/qtest/boot-serial-test: Reorder pair of instructions in PL011 test tests/qtest/boot-serial-test: Reduce for() loop in PL011 tests tests/qtest/boot-serial-test: Improve ASM comments of PL011 tests hw/misc: cast rpm to uint64_t hw/arm_sysctl: fix extracting 31th bit of val Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-01-13target/arm: add new property to select pauth-qarma5Pierrick Bouvier1-4/+11
Before changing default pauth algorithm, we need to make sure current default one (QARMA5) can still be selected. $ qemu-system-aarch64 -cpu max,pauth-qarma5=on ... Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241219183211.3493974-2-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.1 at 2025-09-19 17:05:35 +0000