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2022-04-20tests/qtest: properly initialise the vring used idxAlex Bennée1-0/+2
Eric noticed while attempting to enable the vhost-user-blk-test for Aarch64 that that things didn't work unless he put in a dummy guest_malloc() at the start of the test. Without it qvirtio_wait_used_elem() would assert when it reads a junk value for idx resulting in: qvirtqueue_get_buf: idx:2401 last_idx:0 qvirtqueue_get_buf: 0x7ffcb6d3fe74, (nil) qvirtio_wait_used_elem: 3000000/0 ERROR:../../tests/qtest/libqos/virtio.c:226:qvirtio_wait_used_elem: assertion failed (got_desc_idx == desc_idx): (50331648 == 0) Bail out! ERROR:../../tests/qtest/libqos/virtio.c:226:qvirtio_wait_used_elem: assertion failed (got_desc_idx == desc_idx): (50331648 == 0) What was actually happening is the guest_malloc() effectively pushed the allocation of the vring into the next page which just happened to have clear memory. After much tedious tracing of the code I could see that qvring_init() does attempt initialise a bunch of the vring structures but skips the vring->used.idx value. It is probably not wise to assume guest memory is zeroed anyway. Once the ring is properly initialised the hack is no longer needed to get things working. Thanks-to: John Snow <jsnow@redhat.com> for helping debug Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220406173356.1891500-1-alex.bennee@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-04-20tests/qtest: Move the fuzz tests to x86 onlyThomas Huth6-43/+22
The fuzz tests are currently scheduled for all targets, but their setup code limits the run to "i386", so that these tests always show "SKIP" on other targets. Move it to the right x86 list in meson.build, then we can drop the architecture check during runtime, too. Message-Id: <20220414130127.719528-1-thuth@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-04-20tests/qtest: Enable more tests for the "mipsel" targetThomas Huth2-11/+4
Allow the same set of tests for all MIPS targets, so that "mipsel" now gets some additional test coverage, too. While we're at it, simplify the definitions for qtests_mips64 and qtests_mips64el. Message-Id: <20220414114655.604391-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-04-06Remove qemu-common.h include from most unitsMarc-André Lureau31-34/+0
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-33-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-04-06include: move C/util-related declarations to cutils.hMarc-André Lureau1-1/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-22-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2-2/+2
Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before. This can help to make some code independent from qemu too. gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-03-29tests/qtest: failover: fix infinite loopLaurent Vivier1-4/+25
If the migration is over before we cancel it, we are waiting in a loop a state that never comes because the state is already "completed". To avoid an infinite loop, skip the test if the migration is "completed" before we were able to cancel it. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-id: 20220329124259.355995-1-lvivier@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-22Merge tag 'pull-request-2022-03-21' of https://gitlab.com/thuth/qemu into ↵Peter Maydell2-0/+110
staging * Fix stack-overflow due to recursive DMA in intel-hda (CVE-2021-3611) * Fix heap overflow due to recursive DMA in sdhci code # gpg: Signature made Mon 21 Mar 2022 16:14:36 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-03-21' of https://gitlab.com/thuth/qemu: tests/qtest/fuzz-sdcard-test: Add reproducer for OSS-Fuzz (Issue 29225) hw/sd/sdhci: Prohibit DMA accesses to devices hw/sd/sdhci: Honor failed DMA transactions tests/qtest/intel-hda-test: Add reproducer for issue #542 hw/audio/intel-hda: Restrict DMA engine to memories (not MMIO devices) hw/audio/intel-hda: Do not ignore DMA overrun errors softmmu/physmem: Introduce MemTxAttrs::memory field and MEMTX_ACCESS_ERROR softmmu/physmem: Simplify flatview_write and address_space_access_valid Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-22Replace GCC_FMT_ATTR with G_GNUC_PRINTFMarc-André Lureau4-26/+26
One less qemu-specific macro. It also helps to make some headers/units only depend on glib, and thus moved in standalone projects eventually. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
2022-03-22Drop qemu_foo() socket API wrapperMarc-André Lureau6-17/+17
The socket API wrappers were initially introduced in commit 00aa0040 ("Wrap recv to avoid warnings"), but made redundant with commit a2d96af4 ("osdep: add wrappers for socket functions") which fixes the win32 declarations and thus removed the earlier warnings. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-219pfs: Use g_new() & friends where that makes obvious senseMarkus Armbruster1-2/+2
g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Initial patch created mechanically with: $ spatch --in-place --sp-file scripts/coccinelle/use-g_new-etc.cocci \ --macro-file scripts/cocci-macro-file.h FILES... This uncovers a typing error: ../hw/9pfs/9p.c: In function ‘qid_path_fullmap’: ../hw/9pfs/9p.c:855:13: error: assignment to ‘QpfEntry *’ from incompatible pointer type ‘QppEntry *’ [-Werror=incompatible-pointer-types] 855 | val = g_new0(QppEntry, 1); | ^ Harmless, because QppEntry is larger than QpfEntry. Manually fixed to allocate a QpfEntry instead. Cc: Greg Kurz <groug@kaod.org> Cc: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20220315144156.1595462-3-armbru@redhat.com>
2022-03-21tests/qtest/fuzz-sdcard-test: Add reproducer for OSS-Fuzz (Issue 29225)Philippe Mathieu-Daudé1-0/+76
Include the qtest reproducer provided by Alexander Bulekov in https://gitlab.com/qemu-project/qemu/-/issues/451. Without the previous commit, we get: $ make check-qtest-i386 ... Running test qtest-i386/fuzz-sdcard-test ==447470==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x61500002a080 at pc 0x564c71766d48 bp 0x7ffc126c62b0 sp 0x7ffc126c62a8 READ of size 1 at 0x61500002a080 thread T0 #0 0x564c71766d47 in sdhci_read_dataport hw/sd/sdhci.c:474:18 #1 0x564c7175f139 in sdhci_read hw/sd/sdhci.c:1022:19 #2 0x564c721b937b in memory_region_read_accessor softmmu/memory.c:440:11 #3 0x564c72171e51 in access_with_adjusted_size softmmu/memory.c:554:18 #4 0x564c7216f47c in memory_region_dispatch_read1 softmmu/memory.c:1424:16 #5 0x564c7216ebb9 in memory_region_dispatch_read softmmu/memory.c:1452:9 #6 0x564c7212db5d in flatview_read_continue softmmu/physmem.c:2879:23 #7 0x564c7212f958 in flatview_read softmmu/physmem.c:2921:12 #8 0x564c7212f418 in address_space_read_full softmmu/physmem.c:2934:18 #9 0x564c721305a9 in address_space_rw softmmu/physmem.c:2962:16 #10 0x564c7175a392 in dma_memory_rw_relaxed include/sysemu/dma.h:89:12 #11 0x564c7175a0ea in dma_memory_rw include/sysemu/dma.h:132:12 #12 0x564c71759684 in dma_memory_read include/sysemu/dma.h:152:12 #13 0x564c7175518c in sdhci_do_adma hw/sd/sdhci.c:823:27 #14 0x564c7174bf69 in sdhci_data_transfer hw/sd/sdhci.c:935:13 #15 0x564c7176aaa7 in sdhci_send_command hw/sd/sdhci.c:376:9 #16 0x564c717629ee in sdhci_write hw/sd/sdhci.c:1212:9 #17 0x564c72172513 in memory_region_write_accessor softmmu/memory.c:492:5 #18 0x564c72171e51 in access_with_adjusted_size softmmu/memory.c:554:18 #19 0x564c72170766 in memory_region_dispatch_write softmmu/memory.c:1504:16 #20 0x564c721419ee in flatview_write_continue softmmu/physmem.c:2812:23 #21 0x564c721301eb in flatview_write softmmu/physmem.c:2854:12 #22 0x564c7212fca8 in address_space_write softmmu/physmem.c:2950:18 #23 0x564c721d9a53 in qtest_process_command softmmu/qtest.c:727:9 0x61500002a080 is located 0 bytes to the right of 512-byte region [0x615000029e80,0x61500002a080) allocated by thread T0 here: #0 0x564c708e1737 in __interceptor_calloc (qemu-system-i386+0x1e6a737) #1 0x7ff05567b5e0 in g_malloc0 (/lib64/libglib-2.0.so.0+0x5a5e0) #2 0x564c71774adb in sdhci_pci_realize hw/sd/sdhci-pci.c:36:5 SUMMARY: AddressSanitizer: heap-buffer-overflow hw/sd/sdhci.c:474:18 in sdhci_read_dataport Shadow bytes around the buggy address: 0x0c2a7fffd3c0: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa 0x0c2a7fffd3d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x0c2a7fffd3e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x0c2a7fffd3f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x0c2a7fffd400: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 =>0x0c2a7fffd410:[fa]fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa 0x0c2a7fffd420: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd 0x0c2a7fffd430: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd 0x0c2a7fffd440: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd 0x0c2a7fffd450: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd 0x0c2a7fffd460: fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa fa Shadow byte legend (one shadow byte represents 8 application bytes): Addressable: 00 Heap left redzone: fa Freed heap region: fd ==447470==ABORTING Broken pipe ERROR qtest-i386/fuzz-sdcard-test - too few tests run (expected 3, got 2) Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211215205656.488940-4-philmd@redhat.com> [thuth: Replaced "-m 4G" with "-m 512M"] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-21tests/qtest/intel-hda-test: Add reproducer for issue #542Philippe Mathieu-Daudé1-0/+34
Include the qtest reproducer provided by Alexander Bulekov in https://gitlab.com/qemu-project/qemu/-/issues/542. Without the previous commit, we get: $ make check-qtest-i386 ... Running test tests/qtest/intel-hda-test AddressSanitizer:DEADLYSIGNAL ================================================================= ==1580408==ERROR: AddressSanitizer: stack-overflow on address 0x7ffc3d566fe0 #0 0x63d297cf in address_space_translate_internal softmmu/physmem.c:356 #1 0x63d27260 in flatview_do_translate softmmu/physmem.c:499:15 #2 0x63d27af5 in flatview_translate softmmu/physmem.c:565:15 #3 0x63d4ce84 in flatview_write softmmu/physmem.c:2850:10 #4 0x63d4cb18 in address_space_write softmmu/physmem.c:2950:18 #5 0x63d4d387 in address_space_rw softmmu/physmem.c:2960:16 #6 0x62ae12f2 in dma_memory_rw_relaxed include/sysemu/dma.h:89:12 #7 0x62ae104a in dma_memory_rw include/sysemu/dma.h:132:12 #8 0x62ae6157 in dma_memory_write include/sysemu/dma.h:173:12 #9 0x62ae5ec0 in stl_le_dma include/sysemu/dma.h:275:1 #10 0x62ae5ba2 in stl_le_pci_dma include/hw/pci/pci.h:871:1 #11 0x62ad59a6 in intel_hda_response hw/audio/intel-hda.c:372:12 #12 0x62ad2afb in hda_codec_response hw/audio/intel-hda.c:107:5 #13 0x62aec4e1 in hda_audio_command hw/audio/hda-codec.c:655:5 #14 0x62ae05d9 in intel_hda_send_command hw/audio/intel-hda.c:307:5 #15 0x62adff54 in intel_hda_corb_run hw/audio/intel-hda.c:342:9 #16 0x62adc13b in intel_hda_set_corb_wp hw/audio/intel-hda.c:548:5 #17 0x62ae5942 in intel_hda_reg_write hw/audio/intel-hda.c:977:9 #18 0x62ada10a in intel_hda_mmio_write hw/audio/intel-hda.c:1054:5 #19 0x63d8f383 in memory_region_write_accessor softmmu/memory.c:492:5 #20 0x63d8ecc1 in access_with_adjusted_size softmmu/memory.c:554:18 #21 0x63d8d5d6 in memory_region_dispatch_write softmmu/memory.c:1504:16 #22 0x63d5e85e in flatview_write_continue softmmu/physmem.c:2812:23 #23 0x63d4d05b in flatview_write softmmu/physmem.c:2854:12 #24 0x63d4cb18 in address_space_write softmmu/physmem.c:2950:18 #25 0x63d4d387 in address_space_rw softmmu/physmem.c:2960:16 #26 0x62ae12f2 in dma_memory_rw_relaxed include/sysemu/dma.h:89:12 #27 0x62ae104a in dma_memory_rw include/sysemu/dma.h:132:12 #28 0x62ae6157 in dma_memory_write include/sysemu/dma.h:173:12 #29 0x62ae5ec0 in stl_le_dma include/sysemu/dma.h:275:1 #30 0x62ae5ba2 in stl_le_pci_dma include/hw/pci/pci.h:871:1 #31 0x62ad59a6 in intel_hda_response hw/audio/intel-hda.c:372:12 #32 0x62ad2afb in hda_codec_response hw/audio/intel-hda.c:107:5 #33 0x62aec4e1 in hda_audio_command hw/audio/hda-codec.c:655:5 #34 0x62ae05d9 in intel_hda_send_command hw/audio/intel-hda.c:307:5 #35 0x62adff54 in intel_hda_corb_run hw/audio/intel-hda.c:342:9 #36 0x62adc13b in intel_hda_set_corb_wp hw/audio/intel-hda.c:548:5 #37 0x62ae5942 in intel_hda_reg_write hw/audio/intel-hda.c:977:9 #38 0x62ada10a in intel_hda_mmio_write hw/audio/intel-hda.c:1054:5 #39 0x63d8f383 in memory_region_write_accessor softmmu/memory.c:492:5 #40 0x63d8ecc1 in access_with_adjusted_size softmmu/memory.c:554:18 #41 0x63d8d5d6 in memory_region_dispatch_write softmmu/memory.c:1504:16 #42 0x63d5e85e in flatview_write_continue softmmu/physmem.c:2812:23 #43 0x63d4d05b in flatview_write softmmu/physmem.c:2854:12 #44 0x63d4cb18 in address_space_write softmmu/physmem.c:2950:18 #45 0x63d4d387 in address_space_rw softmmu/physmem.c:2960:16 #46 0x62ae12f2 in dma_memory_rw_relaxed include/sysemu/dma.h:89:12 #47 0x62ae104a in dma_memory_rw include/sysemu/dma.h:132:12 #48 0x62ae6157 in dma_memory_write include/sysemu/dma.h:173:12 ... SUMMARY: AddressSanitizer: stack-overflow softmmu/physmem.c:356 in address_space_translate_internal ==1580408==ABORTING Broken pipe Aborted (core dumped) Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20211218160912.1591633-4-philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-14qtest/meson.build: check CONFIG_TCG for boot-serial-test in qtests_ppcDaniel Henrique Barboza1-1/+2
'boot-serial-test' does not work with a QEMU built with --disable-tcg in a IBM POWER9 host. The reason is that without TCG QEMU will default to KVM acceleration, but then the KVM module in IBM POWER hosts aren't able to handle other CPUs. The result is that the test will break with a KVM error when trying to ruin the ppce500 test: $ QTEST_QEMU_BINARY=./qemu-system-ppc64 ./tests/qtest/boot-serial-test /ppc64/boot-serial/ppce500: qemu-system-ppc64: -accel tcg: invalid accelerator tcg error: kvm run failed Invalid argument NIP 0000000000f00000 LR 0000000000000000 CTR 0000000000000000 XER 0000000000000000 CPU#0 MSR 0000000000000000 HID0 0000000000000000 HF 24020002 iidx 1 didx 1 TB 00000000 00000000 DECR 0 (...) ** (./tests/qtest/boot-serial-test:1935760): ERROR **: 07:44:03.010: Failed to find expected string. Please check '/tmp/qtest-boot-serial-sJ78sqg' Fix it by checking CONFIG_TCG before compiling boot-serial-test. Cc: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220303153517.168943-3-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-14qtest/meson.build: check CONFIG_TCG for prom-env-test in qtests_ppcDaniel Henrique Barboza1-1/+2
'prom-env-test' is a TCG test that will fail if QEMU is compiled with --disable-tcg: $ QTEST_QEMU_BINARY=./qemu-system-ppc64 ./tests/qtest/prom-env-test /ppc64/prom-env/mac99: qemu-system-ppc64: -accel tcg: invalid accelerator tcg (... hangs indefinitely ...) Fix it by checking CONFIG_TCG before compiling prom-env-test. Cc: Thomas Huth <thuth@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220303153517.168943-2-danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-03-09Merge remote-tracking branch 'remotes/philmd/tags/pmbus-20220308' into stagingPeter Maydell2-0/+475
I²C / SMBus / PMBus patches - Add some Renesas models - Add Titus Rwantare to MAINTAINERS # gpg: Signature made Tue 08 Mar 2022 18:11:46 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/pmbus-20220308: hw/sensor: add Renesas raa228000 device hw/sensor: add Renesas raa229004 PMBus device hw/sensor: add Intersil ISL69260 device model hw/i2c: Added linear mode translation for pmbus devices hw/i2c: pmbus: update MAINTAINERS hw/i2c: pmbus: refactor uint handling hw/i2c: pmbus: add PEC unsupported warning hw/i2c: pmbus: fix error returns and guard against out of range accesses hw/i2c: pmbus: add registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-08Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell1-0/+2
virtio,pc,pci: features, cleanups, fixes vhost-user enabled on non-linux systems beginning of nvme sriov support bigger tx queue for vdpa virtio iommu bypass FADT flag to detect legacy keyboards Fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 07 Mar 2022 22:43:31 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (47 commits) hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present tests/acpi: i386: update FACP table differences hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table tests/acpi: i386: allow FACP acpi table changes docs: vhost-user: add subsection for non-Linux platforms configure, meson: allow enabling vhost-user on all POSIX systems vhost: use wfd on functions setting vring call fd event_notifier: add event_notifier_get_wfd() pci: drop COMPAT_PROP_PCP for 2.0 machine types hw/smbios: Add table 4 parameter, "processor-id" x86: cleanup unused compat_apic_id_mode vhost-vsock: detach the virqueue element in case of error pc: add option to disable PS/2 mouse/keyboard acpi: pcihp: pcie: set power on cap on parent slot pci: expose TYPE_XIO3130_DOWNSTREAM name pci: show id info when pci BDF conflict hw/misc/pvpanic: Use standard headers instead headers: Add pvpanic.h pci-bridge/xio3130_downstream: Fix error handling pci-bridge/xio3130_upstream: Fix error handling ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # docs/specs/index.rst
2022-03-08hw/sensor: add Renesas raa228000 deviceTitus Rwantare1-0/+72
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-Id: <20220307200605.4001451-10-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/sensor: add Renesas raa229004 PMBus deviceTitus Rwantare1-0/+8
The Renesas RAA229004 is a PMBus Multiphase Voltage Regulator Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-Id: <20220307200605.4001451-9-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-08hw/sensor: add Intersil ISL69260 device modelTitus Rwantare2-0/+395
Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Corey Minyard <cminyard@mvista.com> Message-Id: <20220307200605.4001451-8-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-03-079p: darwin: Adjust assumption on virtio-9p-testWill Cohen1-1/+1
The previous test depended on the assumption that P9_DOTL_AT_REMOVEDIR and AT_REMOVEDIR have the same value. While this is true on Linux, it is not true everywhere, and leads to an incorrect test failure on unlink_at, noticed when adding 9p to darwin: Received response 7 (RLERROR) instead of 77 (RUNLINKAT) Rlerror has errno 22 (Invalid argument) ** ERROR:../tests/qtest/virtio-9p-test.c:305:v9fs_req_recv: assertion failed (hdr.id == id): (7 == 77) Bail out! ERROR:../tests/qtest/virtio-9p-test.c:305:v9fs_req_recv: assertion failed (hdr.id == id): (7 == 77) Signed-off-by: Fabian Franz <fabianfranz.oss@gmail.com> [Will Cohen: - Add explanation of patch and description of pre-patch test failure] Signed-off-by: Will Cohen <wwcohen@gmail.com> Acked-by: Thomas Huth <thuth@redhat.com> [Will Cohen: - Move this patch before 9p: darwin: meson patch to avoid qtest breakage during bisecting] Signed-off-by: Will Cohen <wwcohen@gmail.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20220227223522.91937-11-wwcohen@gmail.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
2022-03-06tests/acpi: i386: update FACP table differencesLiav Albani1-4/+0
After changing the IAPC boot flags register to indicate support of i8042 in the machine chipset to help the guest OS to determine its existence "faster", we need to have the updated FACP ACPI binary images in tree. The ASL changes introduced are shown by the following diff: @@ -42,35 +42,35 @@ [059h 0089 1] PM1 Control Block Length : 02 [05Ah 0090 1] PM2 Control Block Length : 00 [05Bh 0091 1] PM Timer Block Length : 04 [05Ch 0092 1] GPE0 Block Length : 10 [05Dh 0093 1] GPE1 Block Length : 00 [05Eh 0094 1] GPE1 Base Offset : 00 [05Fh 0095 1] _CST Support : 00 [060h 0096 2] C2 Latency : 0FFF [062h 0098 2] C3 Latency : 0FFF [064h 0100 2] CPU Cache Size : 0000 [066h 0102 2] Cache Flush Stride : 0000 [068h 0104 1] Duty Cycle Offset : 00 [069h 0105 1] Duty Cycle Width : 00 [06Ah 0106 1] RTC Day Alarm Index : 00 [06Bh 0107 1] RTC Month Alarm Index : 00 [06Ch 0108 1] RTC Century Index : 32 -[06Dh 0109 2] Boot Flags (decoded below) : 0000 +[06Dh 0109 2] Boot Flags (decoded below) : 0002 Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 + 8042 Present on ports 60/64 (V2) : 1 VGA Not Present (V4) : 0 MSI Not Supported (V4) : 0 PCIe ASPM Not Supported (V4) : 0 CMOS RTC Not Present (V5) : 0 [06Fh 0111 1] Reserved : 00 [070h 0112 4] Flags (decoded below) : 000084A5 WBINVD instruction is operational (V1) : 1 WBINVD flushes all caches (V1) : 0 All CPUs support C1 (V1) : 1 C2 works on MP system (V1) : 0 Control Method Power Button (V1) : 0 Control Method Sleep Button (V1) : 1 RTC wake not in fixed reg space (V1) : 0 RTC can wake system from S4 (V1) : 1 32-bit PM Timer (V1) : 0 Docking Supported (V1) : 0 Signed-off-by: Liav Albani <liavalb@gmail.com> Acked-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220304154032.2071585-4-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-03-06tests/acpi: i386: allow FACP acpi table changesLiav Albani1-0/+4
The FACP table is going to be changed for x86/q35 machines. To be sure the following changes are not breaking any QEMU test this change follows step 2 from the bios-tables-test.c guide on changes that affect ACPI tables. Signed-off-by: Liav Albani <liavalb@gmail.com> Acked-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220304154032.2071585-2-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-03-06tests/qtest/virtio-iommu-test: Check bypass configJean-Philippe Brucker1-0/+2
The bypass config field should be initialized to 1 by default. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-Id: <20220214124356.872985-5-jean-philippe@linaro.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com>
2022-03-03Merge remote-tracking branch ↵Peter Maydell2-0/+216
'remotes/pmaydell/tags/pull-target-arm-20220302' into staging target-arm queue: * mps3-an547: Add missing user ahb interfaces * hw/arm/mps2-tz.c: Update AN547 documentation URL * hw/input/tsc210x: Don't abort on bad SPI word widths * hw/i2c: flatten pca954x mux device * target/arm: Support PSCI 1.1 and SMCCC 1.0 * target/arm: Fix early free of TCG temp in handle_simd_shift_fpint_conv() * tests/qtest: add qtests for npcm7xx sdhci * Implement FEAT_LVA * Implement FEAT_LPA * Implement FEAT_LPA2 (but do not enable it yet) * Report KVM's actual PSCI version to guest in dtb * ui/cocoa.m: Fix updateUIInfo threading issues * ui/cocoa.m: Remove unnecessary NSAutoreleasePools # gpg: Signature made Wed 02 Mar 2022 20:52:06 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20220302: (26 commits) ui/cocoa.m: Remove unnecessary NSAutoreleasePools ui/cocoa.m: Fix updateUIInfo threading issues target/arm: Report KVM's actual PSCI version to guest in dtb target/arm: Implement FEAT_LPA2 target/arm: Advertise all page sizes for -cpu max target/arm: Validate tlbi TG matches translation granule in use target/arm: Fix TLBIRange.base for 16k and 64k pages target/arm: Introduce tlbi_aa64_get_range target/arm: Extend arm_fi_to_lfsc to level -1 target/arm: Implement FEAT_LPA target/arm: Implement FEAT_LVA target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA target/arm: Honor TCR_ELx.{I}PS target/arm: Use MAKE_64BIT_MASK to compute indexmask target/arm: Pass outputsize down to check_s2_mmu_setup target/arm: Move arm_pamax out of line target/arm: Fault on invalid TCR_ELx.TxSZ target/arm: Set TCR_EL1.TSZ for user-only hw/registerfields: Add FIELD_SEX<N> and FIELD_SDP<N> tests/qtest: add qtests for npcm7xx sdhci ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-02tests/qtest: add qtests for npcm7xx sdhciShengtan Mao2-0/+216
Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Chris Rauer <crauer@google.com> Signed-off-by: Shengtan Mao <stmao@google.com> Signed-off-by: Patrick Venture <venture@google.com> Message-id: 20220225174451.192304-1-wuhaotsh@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-02tests: Pass in MigrateStart** into test_migrate_start()Peter Xu1-12/+15
test_migrate_start() will release the MigrateStart structure that passed in, however that's not super clear to the caller because after the call returned the pointer can still be referenced by the callers. It can easily be a source of use-after-free. Let's pass in a double pointer of that, then we can safely clear the pointer for the caller after the struct is released. Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20220301083925.33483-26-peterx@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> dgilbert: Fixup apply since I didn't take 24/25
2022-02-21tests/qtest: failover: migration abort test with failover offLaurent Vivier1-0/+180
Test abort during active migration when failover is disabled from QEMU or from guest side. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-8-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest: failover: test migration if the guest doesn't support failoverLaurent Vivier1-0/+142
The primary device is not plugged and the migration is done only with the standby device Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-7-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest: failover: check migration with failover offLaurent Vivier1-0/+133
If failover is off, the primary device is not plugged and the migration is done only with the standby device. On destination, the primary device must not be plugged. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-6-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest: failover: check missing guest featureLaurent Vivier1-0/+33
If QEMU provides the VIRTIO_NET_F_STANDBY feature but the guest doesn't the primary device must be kept hidden Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-5-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest: failover: check the feature is correctly providedLaurent Vivier1-53/+86
Check QEMU provides the VIRTIO_NET_F_STANDBY if failover is on, and doesn't if failover is off Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-4-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest: failover: use a macro for check_one_card()Laurent Vivier1-26/+21
This allows g_assert() to correctly report the line number of the error in the test case. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-3-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest: failover: clean up pathname of testsLaurent Vivier1-8/+13
clearly indentify parameters, hotplug and migration tests Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20220203141537.972317-2-lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest/ide-test: Remove bad retry_isa testThomas Huth1-12/+1
The retry_isa test is not doing what it was intended for: The test_retry_flush() function ignores the machine parameter completely and thus this test does not get run with the "isapc" machine. Moreover, in the course of time, the test_retry_flush() has been changed to depend on PCI-related functions, so this also cannot be fixed by simply using the machine parameter now. The correct fix would be to switch the whole test to libqos, but until someone has time to do this, let's simply drop the retry_isa test for now. Message-Id: <20220121120635.220644-1-thuth@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/qtest/vhost-user-test.c: Use vhostforce=onEric Auger1-1/+1
-netdev vhost-user,vhostforce is deprecated and vhostforce=on should be used instead. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220210145254.157790-2-eric.auger@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21erst: drop cast to long longMichael S. Tsirkin1-1/+1
The way to print uint64_t is with PRIx64, not with a cast to long long. Message-Id: <20220206093547.1282513-1-mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/x86: Use 'pc' machine type for hotplug testsDr. David Alan Gilbert4-10/+56
Hotplug tests need a bridge setting up on q35, for now keep them on 'pc'. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220215162537.605030-3-dgilbert@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21tests/x86: Use 'pc' machine type for old hardware testsDr. David Alan Gilbert4-6/+13
For tests that rely on old hardware, e.g. floppies or IDE drives, explicitly select the 'pc' machine type. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220215162537.605030-2-dgilbert@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-17tests/9pfs: Use g_autofree and g_autoptr where possibleGreg Kurz1-9/+4
It is recommended to use g_autofree or g_autoptr as it reduces the odds of introducing memory leaks in future changes. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20220201151508.190035-3-groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
2022-02-17tests/9pfs: Fix leak of local_test_pathGreg Kurz1-0/+7
local_test_path is allocated in virtio_9p_create_local_test_dir() to hold the path of the temporary directory. It should be freed in virtio_9p_remove_local_test_dir() when the temporary directory is removed. Clarify the lifecycle of local_test_path while here. Based-on: <f6602123c6f7d0d593466231b04fba087817abbd.1642879848.git.qemu_oss@crudebyte.com> Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20220201151508.190035-2-groug@kaod.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
2022-02-17tests/9pfs: fix mkdir() being called twiceChristian Schoenebeck1-15/+3
The 9p test cases use mkdtemp() to create a temporary directory for running the 'local' 9p tests with real files/dirs. Unlike mktemp() which only generates a unique file name, mkdtemp() also creates the directory, therefore the subsequent mkdir() was wrong and caused errors on some systems. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Fixes: 136b7af2 (tests/9pfs: fix test dir for parallel tests) Reported-by: Daniel P. Berrangé <berrange@redhat.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/832 Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Greg Kurz <Greg Kurz <groug@kaod.org> Message-Id: <f6602123c6f7d0d593466231b04fba087817abbd.1642879848.git.qemu_oss@crudebyte.com>
2022-02-17tests/9pfs: use g_autofree where possibleChristian Schoenebeck1-63/+27
Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <E1mn1fA-0005qZ-TM@lizzy.crudebyte.com>
2022-02-09tests/qtest: enable more vhost-user tests by defaultAlex Bennée1-12/+9
If this starts causing failures again we should probably fix that. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220204204335.1689602-3-alex.bennee@linaro.org>
2022-02-08hw/sensor: Add lsm303dlhc magnetometer deviceKevin Townsend2-0/+149
This commit adds emulation of the magnetometer on the LSM303DLHC. It allows the magnetometer's X, Y and Z outputs to be set via the mag-x, mag-y and mag-z properties, as well as the 12-bit temperature output via the temperature property. Sensor can be enabled with 'CONFIG_LSM303DLHC_MAG=y'. Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org> Message-id: 20220130095032.35392-1-kevin.townsend@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-02-06ACPI ERST: step 6 of bios-tables-test.cEric DeVolder1-5/+0
Following the guidelines in tests/qtest/bios-tables-test.c, this is step 6. Below is the disassembly of tests/data/acpi/pc/ERST.acpierst. /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180508 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * * Disassembly of tests/data/acpi/pc/ERST.acpierst, Thu Dec 2 13:32:07 2021 * * ACPI Data Table [ERST] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "ERST" [Error Record Serialization Table] [004h 0004 4] Table Length : 00000390 [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : D6 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Serialization Header Length : 00000030 [028h 0040 4] Reserved : 00000000 [02Ch 0044 4] Instruction Entry Count : 0000001B [030h 0048 1] Action : 00 [Begin Write Operation] [031h 0049 1] Instruction : 03 [Write Register Value] [032h 0050 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [033h 0051 1] Reserved : 00 [034h 0052 12] Register Region : [Generic Address Structure] [034h 0052 1] Space ID : 00 [SystemMemory] [035h 0053 1] Bit Width : 20 [036h 0054 1] Bit Offset : 00 [037h 0055 1] Encoded Access Width : 03 [DWord Access:32] [038h 0056 8] Address : 00000000FEBF3000 [040h 0064 8] Value : 0000000000000000 [048h 0072 8] Mask : 00000000000000FF [050h 0080 1] Action : 01 [Begin Read Operation] [051h 0081 1] Instruction : 03 [Write Register Value] [052h 0082 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [053h 0083 1] Reserved : 00 [054h 0084 12] Register Region : [Generic Address Structure] [054h 0084 1] Space ID : 00 [SystemMemory] [055h 0085 1] Bit Width : 20 [056h 0086 1] Bit Offset : 00 [057h 0087 1] Encoded Access Width : 03 [DWord Access:32] [058h 0088 8] Address : 00000000FEBF3000 [060h 0096 8] Value : 0000000000000001 [068h 0104 8] Mask : 00000000000000FF [070h 0112 1] Action : 02 [Begin Clear Operation] [071h 0113 1] Instruction : 03 [Write Register Value] [072h 0114 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [073h 0115 1] Reserved : 00 [074h 0116 12] Register Region : [Generic Address Structure] [074h 0116 1] Space ID : 00 [SystemMemory] [075h 0117 1] Bit Width : 20 [076h 0118 1] Bit Offset : 00 [077h 0119 1] Encoded Access Width : 03 [DWord Access:32] [078h 0120 8] Address : 00000000FEBF3000 [080h 0128 8] Value : 0000000000000002 [088h 0136 8] Mask : 00000000000000FF [090h 0144 1] Action : 03 [End Operation] [091h 0145 1] Instruction : 03 [Write Register Value] [092h 0146 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [093h 0147 1] Reserved : 00 [094h 0148 12] Register Region : [Generic Address Structure] [094h 0148 1] Space ID : 00 [SystemMemory] [095h 0149 1] Bit Width : 20 [096h 0150 1] Bit Offset : 00 [097h 0151 1] Encoded Access Width : 03 [DWord Access:32] [098h 0152 8] Address : 00000000FEBF3000 [0A0h 0160 8] Value : 0000000000000003 [0A8h 0168 8] Mask : 00000000000000FF [0B0h 0176 1] Action : 04 [Set Record Offset] [0B1h 0177 1] Instruction : 02 [Write Register] [0B2h 0178 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [0B3h 0179 1] Reserved : 00 [0B4h 0180 12] Register Region : [Generic Address Structure] [0B4h 0180 1] Space ID : 00 [SystemMemory] [0B5h 0181 1] Bit Width : 20 [0B6h 0182 1] Bit Offset : 00 [0B7h 0183 1] Encoded Access Width : 03 [DWord Access:32] [0B8h 0184 8] Address : 00000000FEBF3008 [0C0h 0192 8] Value : 0000000000000000 [0C8h 0200 8] Mask : 00000000FFFFFFFF [0D0h 0208 1] Action : 04 [Set Record Offset] [0D1h 0209 1] Instruction : 03 [Write Register Value] [0D2h 0210 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [0D3h 0211 1] Reserved : 00 [0D4h 0212 12] Register Region : [Generic Address Structure] [0D4h 0212 1] Space ID : 00 [SystemMemory] [0D5h 0213 1] Bit Width : 20 [0D6h 0214 1] Bit Offset : 00 [0D7h 0215 1] Encoded Access Width : 03 [DWord Access:32] [0D8h 0216 8] Address : 00000000FEBF3000 [0E0h 0224 8] Value : 0000000000000004 [0E8h 0232 8] Mask : 00000000000000FF [0F0h 0240 1] Action : 05 [Execute Operation] [0F1h 0241 1] Instruction : 03 [Write Register Value] [0F2h 0242 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [0F3h 0243 1] Reserved : 00 [0F4h 0244 12] Register Region : [Generic Address Structure] [0F4h 0244 1] Space ID : 00 [SystemMemory] [0F5h 0245 1] Bit Width : 20 [0F6h 0246 1] Bit Offset : 00 [0F7h 0247 1] Encoded Access Width : 03 [DWord Access:32] [0F8h 0248 8] Address : 00000000FEBF3008 [100h 0256 8] Value : 000000000000009C [108h 0264 8] Mask : 00000000000000FF [110h 0272 1] Action : 05 [Execute Operation] [111h 0273 1] Instruction : 03 [Write Register Value] [112h 0274 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [113h 0275 1] Reserved : 00 [114h 0276 12] Register Region : [Generic Address Structure] [114h 0276 1] Space ID : 00 [SystemMemory] [115h 0277 1] Bit Width : 20 [116h 0278 1] Bit Offset : 00 [117h 0279 1] Encoded Access Width : 03 [DWord Access:32] [118h 0280 8] Address : 00000000FEBF3000 [120h 0288 8] Value : 0000000000000005 [128h 0296 8] Mask : 00000000000000FF [130h 0304 1] Action : 06 [Check Busy Status] [131h 0305 1] Instruction : 03 [Write Register Value] [132h 0306 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [133h 0307 1] Reserved : 00 [134h 0308 12] Register Region : [Generic Address Structure] [134h 0308 1] Space ID : 00 [SystemMemory] [135h 0309 1] Bit Width : 20 [136h 0310 1] Bit Offset : 00 [137h 0311 1] Encoded Access Width : 03 [DWord Access:32] [138h 0312 8] Address : 00000000FEBF3000 [140h 0320 8] Value : 0000000000000006 [148h 0328 8] Mask : 00000000000000FF [150h 0336 1] Action : 06 [Check Busy Status] [151h 0337 1] Instruction : 01 [Read Register Value] [152h 0338 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [153h 0339 1] Reserved : 00 [154h 0340 12] Register Region : [Generic Address Structure] [154h 0340 1] Space ID : 00 [SystemMemory] [155h 0341 1] Bit Width : 20 [156h 0342 1] Bit Offset : 00 [157h 0343 1] Encoded Access Width : 03 [DWord Access:32] [158h 0344 8] Address : 00000000FEBF3008 [160h 0352 8] Value : 0000000000000001 [168h 0360 8] Mask : 00000000000000FF [170h 0368 1] Action : 07 [Get Command Status] [171h 0369 1] Instruction : 03 [Write Register Value] [172h 0370 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [173h 0371 1] Reserved : 00 [174h 0372 12] Register Region : [Generic Address Structure] [174h 0372 1] Space ID : 00 [SystemMemory] [175h 0373 1] Bit Width : 20 [176h 0374 1] Bit Offset : 00 [177h 0375 1] Encoded Access Width : 03 [DWord Access:32] [178h 0376 8] Address : 00000000FEBF3000 [180h 0384 8] Value : 0000000000000007 [188h 0392 8] Mask : 00000000000000FF [190h 0400 1] Action : 07 [Get Command Status] [191h 0401 1] Instruction : 00 [Read Register] [192h 0402 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [193h 0403 1] Reserved : 00 [194h 0404 12] Register Region : [Generic Address Structure] [194h 0404 1] Space ID : 00 [SystemMemory] [195h 0405 1] Bit Width : 20 [196h 0406 1] Bit Offset : 00 [197h 0407 1] Encoded Access Width : 03 [DWord Access:32] [198h 0408 8] Address : 00000000FEBF3008 [1A0h 0416 8] Value : 0000000000000000 [1A8h 0424 8] Mask : 00000000000000FF [1B0h 0432 1] Action : 08 [Get Record Identifier] [1B1h 0433 1] Instruction : 03 [Write Register Value] [1B2h 0434 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [1B3h 0435 1] Reserved : 00 [1B4h 0436 12] Register Region : [Generic Address Structure] [1B4h 0436 1] Space ID : 00 [SystemMemory] [1B5h 0437 1] Bit Width : 20 [1B6h 0438 1] Bit Offset : 00 [1B7h 0439 1] Encoded Access Width : 03 [DWord Access:32] [1B8h 0440 8] Address : 00000000FEBF3000 [1C0h 0448 8] Value : 0000000000000008 [1C8h 0456 8] Mask : 00000000000000FF [1D0h 0464 1] Action : 08 [Get Record Identifier] [1D1h 0465 1] Instruction : 00 [Read Register] [1D2h 0466 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [1D3h 0467 1] Reserved : 00 [1D4h 0468 12] Register Region : [Generic Address Structure] [1D4h 0468 1] Space ID : 00 [SystemMemory] [1D5h 0469 1] Bit Width : 40 [1D6h 0470 1] Bit Offset : 00 [1D7h 0471 1] Encoded Access Width : 04 [QWord Access:64] [1D8h 0472 8] Address : 00000000FEBF3008 [1E0h 0480 8] Value : 0000000000000000 [1E8h 0488 8] Mask : FFFFFFFFFFFFFFFF [1F0h 0496 1] Action : 09 [Set Record Identifier] [1F1h 0497 1] Instruction : 02 [Write Register] [1F2h 0498 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [1F3h 0499 1] Reserved : 00 [1F4h 0500 12] Register Region : [Generic Address Structure] [1F4h 0500 1] Space ID : 00 [SystemMemory] [1F5h 0501 1] Bit Width : 40 [1F6h 0502 1] Bit Offset : 00 [1F7h 0503 1] Encoded Access Width : 04 [QWord Access:64] [1F8h 0504 8] Address : 00000000FEBF3008 [200h 0512 8] Value : 0000000000000000 [208h 0520 8] Mask : FFFFFFFFFFFFFFFF [210h 0528 1] Action : 09 [Set Record Identifier] [211h 0529 1] Instruction : 03 [Write Register Value] [212h 0530 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [213h 0531 1] Reserved : 00 [214h 0532 12] Register Region : [Generic Address Structure] [214h 0532 1] Space ID : 00 [SystemMemory] [215h 0533 1] Bit Width : 20 [216h 0534 1] Bit Offset : 00 [217h 0535 1] Encoded Access Width : 03 [DWord Access:32] [218h 0536 8] Address : 00000000FEBF3000 [220h 0544 8] Value : 0000000000000009 [228h 0552 8] Mask : 00000000000000FF [230h 0560 1] Action : 0A [Get Record Count] [231h 0561 1] Instruction : 03 [Write Register Value] [232h 0562 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [233h 0563 1] Reserved : 00 [234h 0564 12] Register Region : [Generic Address Structure] [234h 0564 1] Space ID : 00 [SystemMemory] [235h 0565 1] Bit Width : 20 [236h 0566 1] Bit Offset : 00 [237h 0567 1] Encoded Access Width : 03 [DWord Access:32] [238h 0568 8] Address : 00000000FEBF3000 [240h 0576 8] Value : 000000000000000A [248h 0584 8] Mask : 00000000000000FF [250h 0592 1] Action : 0A [Get Record Count] [251h 0593 1] Instruction : 00 [Read Register] [252h 0594 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [253h 0595 1] Reserved : 00 [254h 0596 12] Register Region : [Generic Address Structure] [254h 0596 1] Space ID : 00 [SystemMemory] [255h 0597 1] Bit Width : 20 [256h 0598 1] Bit Offset : 00 [257h 0599 1] Encoded Access Width : 03 [DWord Access:32] [258h 0600 8] Address : 00000000FEBF3008 [260h 0608 8] Value : 0000000000000000 [268h 0616 8] Mask : 00000000FFFFFFFF [270h 0624 1] Action : 0B [Begin Dummy Write] [271h 0625 1] Instruction : 03 [Write Register Value] [272h 0626 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [273h 0627 1] Reserved : 00 [274h 0628 12] Register Region : [Generic Address Structure] [274h 0628 1] Space ID : 00 [SystemMemory] [275h 0629 1] Bit Width : 20 [276h 0630 1] Bit Offset : 00 [277h 0631 1] Encoded Access Width : 03 [DWord Access:32] [278h 0632 8] Address : 00000000FEBF3000 [280h 0640 8] Value : 000000000000000B [288h 0648 8] Mask : 00000000000000FF [290h 0656 1] Action : 0D [Get Error Address Range] [291h 0657 1] Instruction : 03 [Write Register Value] [292h 0658 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [293h 0659 1] Reserved : 00 [294h 0660 12] Register Region : [Generic Address Structure] [294h 0660 1] Space ID : 00 [SystemMemory] [295h 0661 1] Bit Width : 20 [296h 0662 1] Bit Offset : 00 [297h 0663 1] Encoded Access Width : 03 [DWord Access:32] [298h 0664 8] Address : 00000000FEBF3000 [2A0h 0672 8] Value : 000000000000000D [2A8h 0680 8] Mask : 00000000000000FF [2B0h 0688 1] Action : 0D [Get Error Address Range] [2B1h 0689 1] Instruction : 00 [Read Register] [2B2h 0690 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [2B3h 0691 1] Reserved : 00 [2B4h 0692 12] Register Region : [Generic Address Structure] [2B4h 0692 1] Space ID : 00 [SystemMemory] [2B5h 0693 1] Bit Width : 40 [2B6h 0694 1] Bit Offset : 00 [2B7h 0695 1] Encoded Access Width : 04 [QWord Access:64] [2B8h 0696 8] Address : 00000000FEBF3008 [2C0h 0704 8] Value : 0000000000000000 [2C8h 0712 8] Mask : FFFFFFFFFFFFFFFF [2D0h 0720 1] Action : 0E [Get Error Address Length] [2D1h 0721 1] Instruction : 03 [Write Register Value] [2D2h 0722 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [2D3h 0723 1] Reserved : 00 [2D4h 0724 12] Register Region : [Generic Address Structure] [2D4h 0724 1] Space ID : 00 [SystemMemory] [2D5h 0725 1] Bit Width : 20 [2D6h 0726 1] Bit Offset : 00 [2D7h 0727 1] Encoded Access Width : 03 [DWord Access:32] [2D8h 0728 8] Address : 00000000FEBF3000 [2E0h 0736 8] Value : 000000000000000E [2E8h 0744 8] Mask : 00000000000000FF [2F0h 0752 1] Action : 0E [Get Error Address Length] [2F1h 0753 1] Instruction : 00 [Read Register] [2F2h 0754 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [2F3h 0755 1] Reserved : 00 [2F4h 0756 12] Register Region : [Generic Address Structure] [2F4h 0756 1] Space ID : 00 [SystemMemory] [2F5h 0757 1] Bit Width : 40 [2F6h 0758 1] Bit Offset : 00 [2F7h 0759 1] Encoded Access Width : 04 [QWord Access:64] [2F8h 0760 8] Address : 00000000FEBF3008 [300h 0768 8] Value : 0000000000000000 [308h 0776 8] Mask : 00000000FFFFFFFF [310h 0784 1] Action : 0F [Get Error Attributes] [311h 0785 1] Instruction : 03 [Write Register Value] [312h 0786 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [313h 0787 1] Reserved : 00 [314h 0788 12] Register Region : [Generic Address Structure] [314h 0788 1] Space ID : 00 [SystemMemory] [315h 0789 1] Bit Width : 20 [316h 0790 1] Bit Offset : 00 [317h 0791 1] Encoded Access Width : 03 [DWord Access:32] [318h 0792 8] Address : 00000000FEBF3000 [320h 0800 8] Value : 000000000000000F [328h 0808 8] Mask : 00000000000000FF [330h 0816 1] Action : 0F [Get Error Attributes] [331h 0817 1] Instruction : 00 [Read Register] [332h 0818 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [333h 0819 1] Reserved : 00 [334h 0820 12] Register Region : [Generic Address Structure] [334h 0820 1] Space ID : 00 [SystemMemory] [335h 0821 1] Bit Width : 20 [336h 0822 1] Bit Offset : 00 [337h 0823 1] Encoded Access Width : 03 [DWord Access:32] [338h 0824 8] Address : 00000000FEBF3008 [340h 0832 8] Value : 0000000000000000 [348h 0840 8] Mask : 00000000FFFFFFFF [350h 0848 1] Action : 10 [Execute Timings] [351h 0849 1] Instruction : 03 [Write Register Value] [352h 0850 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [353h 0851 1] Reserved : 00 [354h 0852 12] Register Region : [Generic Address Structure] [354h 0852 1] Space ID : 00 [SystemMemory] [355h 0853 1] Bit Width : 20 [356h 0854 1] Bit Offset : 00 [357h 0855 1] Encoded Access Width : 03 [DWord Access:32] [358h 0856 8] Address : 00000000FEBF3000 [360h 0864 8] Value : 0000000000000010 [368h 0872 8] Mask : 00000000000000FF [370h 0880 1] Action : 10 [Execute Timings] [371h 0881 1] Instruction : 00 [Read Register] [372h 0882 1] Flags (decoded below) : 00 Preserve Register Bits : 0 [373h 0883 1] Reserved : 00 [374h 0884 12] Register Region : [Generic Address Structure] [374h 0884 1] Space ID : 00 [SystemMemory] [375h 0885 1] Bit Width : 40 [376h 0886 1] Bit Offset : 00 [377h 0887 1] Encoded Access Width : 04 [QWord Access:64] [378h 0888 8] Address : 00000000FEBF3008 [380h 0896 8] Value : 0000000000000000 [388h 0904 8] Mask : FFFFFFFFFFFFFFFF Raw Table Data: Length 912 (0x390) Note that the contents of tests/data/q35/ERST.acpierst and tests/data/microvm/ERST.pcie are the same except for differences due to assigned base address. Files tests/data/pc/DSDT.acpierst and tests/data/acpi/q35/DSDT.acpierst are new files (and are included as a result of 'make check' process). Rather than provide the entire content, I am providing the differences between pc/DSDT and pc/DSDT.acpierst, and the difference between q35/DSDT and q35/DSDT.acpierst, with an explanation to follow. diff pc/DSDT pc/DSDT.acpierst: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/pc/DSDT, Thu Dec 2 10:10:13 2021 + * Disassembly of tests/data/acpi/pc/DSDT.acpierst, Thu Dec 2 12:59:36 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00001772 (6002) + * Length 0x00001751 (5969) * Revision 0x01 **** 32-bit table (V1), no 64-bit math support - * Checksum 0x9E + * Checksum 0x95 * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -964,16 +964,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS " Device (S18) { - Name (_SUN, 0x03) // _SUN: Slot User Number Name (_ADR, 0x00030000) // _ADR: Address - Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device - { - PCEJ (BSEL, _SUN) - } - + Name (ASUN, 0x03) Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method { - Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, ASUN)) } } @@ -1399,11 +1394,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS " Method (DVNT, 2, NotSerialized) { - If ((Arg0 & 0x08)) - { - Notify (S18, Arg1) - } - If ((Arg0 & 0x10)) { Notify (S20, Arg1) diff q35/DSDT and q35/DSDT.acpierst: @@ -5,13 +5,13 @@ * * Disassembling to symbolic ASL+ operators * - * Disassembly of tests/data/acpi/q35/DSDT, Thu Dec 2 10:10:13 2021 + * Disassembly of tests/data/acpi/q35/DSDT.acpierst, Thu Dec 2 12:59:36 2021 * * Original Table Header: * Signature "DSDT" - * Length 0x00002061 (8289) + * Length 0x00002072 (8306) * Revision 0x01 **** 32-bit table (V1), no 64-bit math support - * Checksum 0xFA + * Checksum 0x9A * OEM ID "BOCHS " * OEM Table ID "BXPC " * OEM Revision 0x00000001 (1) @@ -3278,6 +3278,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS " } } + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + Method (PCNT, 0, NotSerialized) { } For both pc and q35, there is but a small difference between this DSDT.acpierst and the corresponding DSDT. In both cases, the changes occur under the hiearchy: Scope (\_SB) { Scope (PCI0) { which leads me to believe that the change to the DSDT was needed due to the introduction of the ERST PCI device. And is explained in detail by Ani Sinha: I have convinced myself of the changes we see in the DSDT tables. On i440fx side, we are adding a non-hotpluggable pci device on slot 3. So the changes we see are basically replacing an empty hotpluggable slot on the pci root port with a non-hotplugggable device. On q35, bsel on pcie root bus is not set (its not hotpluggable bus), so the change basically adds the address enumeration for the device. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Acked-by: Ani Sinha <ani@anisinha.ca> Message-Id: <1643402289-22216-11-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-02-06ACPI ERST: bios-tables-test testcaseEric DeVolder1-0/+54
This change implements the test suite checks for the ERST table. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Message-Id: <1643402289-22216-10-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-02-06ACPI ERST: qtest for ERSTEric DeVolder2-0/+166
This change provides a qtest that locates and then does a simple interrogation of the ERST feature within the guest. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Message-Id: <1643402289-22216-9-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-02-06ACPI ERST: bios-tables-test.c steps 1 and 2Eric DeVolder1-0/+5
Following the guidelines in tests/qtest/bios-tables-test.c, this change adds empty placeholder files per step 1 for the new ERST table, and excludes resulting changed files in bios-tables-test-allowed-diff.h per step 2. Signed-off-by: Eric DeVolder <eric.devolder@oracle.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1643402289-22216-2-git-send-email-eric.devolder@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-02-04tests: acpi: test short OEM_ID/OEM_TABLE_ID values in test_oem_fields()Igor Mammedov1-6/+6
Previous patch [1] added explicit whitespace padding to OEM_ID/OEM_TABLE_ID values used in test_oem_fields() testcase to avoid false positive and bisection issues when QEMU is switched to \0' padding. As result testcase ceased to test values that were shorter than max possible length values. Update testcase to make sure that it's testing shorter IDs like it used to before [2]. 1) "tests: acpi: manually pad OEM_ID/OEM_TABLE_ID for test_oem_fields() test" 2) 602b458201 ("acpi: Permit OEM ID and OEM table ID fields to be changed") Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220114142641.1727679-1-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.1 at 2025-01-29 21:53:19 +0000