aboutsummaryrefslogtreecommitdiff
path: root/tests/libqos/pci.c
AgeCommit message (Collapse)AuthorFilesLines
2020-01-12tests/libqos: Move the libqos files under tests/qtest/Thomas Huth1-457/+0
The qos stuff belongs to qtest, so move it into that directory, too. Message-Id: <20191218103059.11729-8-thuth@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-10-25libqos: add iteration support to qpci_find_capability()Stefan Hajnoczi1-6/+24
VIRTIO 1.0 PCI devices have multiple PCI_CAP_ID_VNDR capabilities so we need a way to iterate over them. Extend qpci_find_capability() to take the last address. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> -- v3: * Document qpci_find_capability() Message-Id: <20191023100425.12168-11-stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-03-07tests/libqos: has_buggy_msi flagEmanuele Giuseppe Esposito1-0/+14
The Qgraph framework makes any test using pci bus run the same function using pci-pci and pci-spapr bus. However, some tests are not ready to use the spapr bus, due to a MSI bug. Until it does not get fixed, this flag allows them to skip the test Signed-off-by: Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-07tests/libqos: pci-pc driver and interface nodesEmanuele Giuseppe Esposito1-2/+30
Add pci-bus-pc node, move QPCIBusPC struct declaration in its header (since it will be needed by other drivers) and introduce a setter method for drivers that do not need to allocate but have to initialize QPCIBusPC. Signed-off-by: Emanuele Giuseppe Esposito <e.emanuelegiuseppe@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-08-16tests: Clean up string interpolation around qtest_qmp_device_add()Markus Armbruster1-7/+0
Leaving interpolation into JSON to qmp() is more robust than building QMP input manually, as explained in the commit before previous. qtest_qmp_device_add() and its wrappers interpolate into JSON as follows: * qtest_qmp_device_add() interpolates members into a JSON object. * So do its wrappers qpci_plug_device_test() and usb_test_hotplug(). * usb_test_hotplug() additionally interpolates strings and numbers into JSON strings. Clean them up: * Have qtest_qmp_device_add() take its extra device properties as arguments for qdict_from_jsonf_nofail() instead of a string containing JSON members. * Drop qpci_plug_device_test(), use qtest_qmp_device_add() directly. * Change usb_test_hotplug() parameter @port to string, to avoid interpolation. Interpolate @hcd_id separately. Bonus: gets rid of a non-literal format string. A step towards compile-time format string checking without triggering -Wformat-nonliteral. Cc: Thomas Huth <thuth@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20180806065344.7103-15-armbru@redhat.com>
2017-09-15tests: Fix broken ivshmem-server-msi/-irq testsThomas Huth1-1/+6
Broken with commit b4ba67d9a7025 ("libqos: Change PCI accessors to take opaque BAR handle") a while ago, but nobody noticed since the tests are not run by default: The msix_pba_bar is not correctly initialized anymore if bir_pba has the same value as bir_table. With this fix, "make check SPEED=slow" should work fine again. Fixes: b4ba67d9a702507793c2724e56f98e9b0f7be02b Tested-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2017-09-15tests: Introduce generic device hot-plug/hot-unplug functionsThomas Huth1-17/+2
A lot of tests provide code for adding and removing a device via the device_add and device_del QMP commands. Maintaining this code in so many places is cumbersome and error-prone (some of the code parts check the responses for device deletion in an incorrect way, for example, we've got to deal with both, error code and DEVICE_DEL event here). So let's provide some proper generic functions for adding and removing a device instead. The code for correctly unplugging a device has been taken from a patch from Peter Xu. Reviewed-by: Peter Xu <peterx@redhat.com> Tested-by: Peter Xu <peterx@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-10-28libqos: Change PCI accessors to take opaque BAR handleDavid Gibson1-81/+68
The usual use model for the libqos PCI functions is to map a specific PCI BAR using qpci_iomap() then pass the returned token into IO accessor functions. This, and the fact that iomap() returns a (void *) which actually contains a PCI space address, kind of suggests that the return value from iomap is supposed to be an opaque token. ..except that the callers expect to be able to add offsets to it. Which also assumes the compiler will support pointer arithmetic on a (void *), and treat it as working with byte offsets. To clarify this situation change iomap() and the IO accessors to take a definitely opaque BAR handle (enforced with a wrapper struct) along with an offset within the BAR. This changes both the functions and all the callers. There were a number of places that checked if iomap() returned non-NULL, and or initialized it to NULL before hand. Since iomap() already assert()s if it fails to map the BAR, these tests were mostly pointless and are removed. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-28libqos: Add 64-bit PCI IO accessorsDavid Gibson1-0/+25
Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32 bit reads and writes. It's likely that we'll want 64-bit accesses in the future (plenty of modern peripherals will have 64-bit reigsters). This adds them. For PIO (not MMIO) accesses on the PC backend, this is implemented as two 32-bit ins or outs. That's not ideal but AFAICT x86 doesn't have 64-bit versions of in and out. This patch also converts the single current user of 64-bit accesses - virtio-pci.c to use the new mechanism, rather than a sequence of 8 byte reads. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-28libqos: Implement mmio accessors in terms of mem{read,write}David Gibson1-6/+14
In the libqos PCI code we now have accessors both for registers (byte significance preserving) and for streaming data (byte address order preserving). These exist in both the interface for qtest drivers and in the machine specific backends. However, the register-style accessors aren't actually necessary in the backend. They can be implemented in terms of the byte address order preserving accessors by the libqos wrappers. This works because PCI is always little endian. This does assume that the back end byte address order preserving accessors will perform the equivalent of a single bus transaction for short lengths. This is the case, and in fact they currently end up using the same cpu_physical_memory_rw() implementation within the qtest accelerator. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-28libqos: Add streaming accessors for PCI MMIODavid Gibson1-0/+16
Currently PCI memory (aka MMIO) space is accessed via a set of readb/writeb style accessors. This is what we want for accessing discrete registers of a certain size. However, there are a few cases where we instead need a "bag of bytes" style streaming interface to PCI MMIO space. This can be either for streaming data style registers or when there's actual memory rather than registers in PCI space, for example frame buffers or ivshmem. This patch adds backend callbacks, and libqos wrappers for this type of byte address order preserving accesses. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-28libqos: Better handling of PCI legacy IODavid Gibson1-0/+5
The usual model for PCI IO with libqos is to use qpci_iomap() to map a specific BAR for a PCI device, then perform IOs within that BAR using qpci_io_{read,write}*(). However, certain devices also have legacy PCI IO. In this case, instead of (or as well as) being accessed via PCI BARs, the device can be accessed via certain well-known, fixed addresses in PCI IO space. Two existing tests use legacy PCI IO, and take different flawed approaches to it: * tco-test manually constructs a tco_io_base value instead of calling qpci_iomap(), which assumes internal knowledge of the structure of the value it shouldn't have * ide-test uses direct in*() and out*() calls instead of using qpci_io_*() accessors, meaning it's not portable to non-x86 machine types. This patch implements a new qpci_iomap_legacy() interface which gets a handle in the same format as qpci_iomap() but refers to a region in the legacy PIO space. For a device which has the same registers available both in a BAR and in legacy space (quite common), this allows the same test code to test both options with just a different iomap() at the beginning. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-28libqos: Move BAR assignment to common codeDavid Gibson1-2/+54
The PCI backends in libqos each supply an iomap() and iounmap() function which is used to set up a specified PCI BAR. But PCI BAR allocation takes place entirely within PCI space, so doesn't really need per-backend versions. For example, Linux includes generic BAR allocation code used on platforms where that isn't done by firmware. This patch merges the BAR allocation from the two existing backends into a single simplified copy. The back ends just need to set up some parameters describing the window of PCI IO and PCI memory addresses which are available for allocation. Like both the existing versions the new one uses a simple bump allocator. Note that (again like the existing versions) this doesn't really handle 64-bit memory BARs properly. It is actually used for such a BAR by the ivshmem test, and apparently the 32-bit MMIO BAR logic is close enough to work, as long as the BAR isn't too big. Fixing that to properly handle 64-bit BAR allocation is a problem for another time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-28libqos: Handle PCI IO de-multiplexing in common codeDavid Gibson1-7/+42
The PCI IO space (aka PIO, aka legacy IO) and PCI memory space (aka MMIO) are distinct address spaces by the PCI spec (although parts of one might be aliased to parts of the other in some cases). However, qpci_io_read*() and qpci_io_write*() can perform accesses to either space depending on parameter. That's convenient for test case drivers, since there are a fair few devices which can be controlled via either a PIO or MMIO BAR but with an otherwise identical driver. This is implemented by having addresses below 64kiB treated as PIO, and those above treated as MMIO. This works because low addresses in memory space are generally reserved for DMA rather than MMIO. At the moment, this demultiplexing must be handled by each PCI backend (pc and spapr, so far). There's no real reason for this - the current encoding is likely to work for all platforms, and even if it doesn't we can still use a more complex common encoding since the value returned from iomap are semi-opaque. This patch moves the demultiplexing into the common part of the libqos PCI code, with the backends having simpler, separate accessors for PIO and MMIO space. This also means we have a way of explicitly accessing either space if it's necessary for some special case. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org>
2016-10-06libqos: add PPC64 PCI supportLaurent Vivier1-1/+21
Signed-off-by: Laurent Vivier <lvivier@redhat.com> [dwg: Fixed build problem on 32-bit hosts] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-06-07tests: Remove unnecessary glib.h includesPeter Maydell1-1/+0
Remove glib.h includes, as it is provided by osdep.h. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-02-16tests: Clean up includesPeter Maydell1-0/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com>
2016-02-02libqos: remove some leaksMarc-André Lureau1-0/+2
qpci_device_find() returns allocated data, don't leak it. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2014-09-22ahci: add test_pci_enable to ahci-test.John Snow1-0/+6
This adds a test wherein we engage the PCI AHCI device and ensure that the memory region for the HBA functionality is now accessible. Under Q35 environments, additional PCI configuration is performed to ensure that the HBA functionality will become usable. Signed-off-by: John Snow <jsnow@redhat.com> Message-id: 1408643079-30675-5-git-send-email-jsnow@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-09-08libqos: Added MSI-X supportMarc Marí1-2/+109
Added MSI-X support for qtest PCI. Added MSI-X support for virtio-pci. Added MSI-X test case in virtio-blk-test. Signed-off-by: Marc Marí <marc.mari.barcelo@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-08-15libqos: allow qpci_iomap to return BAR mapping sizeJohn Snow1-2/+2
This patch allows qpci_iomap to return the size of the BAR mapping that it created, to allow driver applications (e.g, ahci-test) to make determinations about the suitability or the mapping size, or in the specific case of AHCI, how many ports are supported by the HBA. Signed-off-by: John Snow <jsnow@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-02qtest: fix qpci_config_writelGerd Hoffmann1-1/+1
Found by Paolo. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-05-08libqos/pci: Enable bus masteringKevin Wolf1-1/+1
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2013-04-17qtest: add libqos including PCI supportAnthony Liguori1-0/+151
This includes basic PCI support for the PC platform. Enough abstraction should be present to support non-PC platforms too. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1366123521-4330-3-git-send-email-aliguori@us.ibm.com