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AgeCommit message (Expand)AuthorFilesLines
2021-10-13tcg: Canonicalize alignment flags in MemOpRichard Henderson1-1/+6
2021-10-13tcg: Move helper_*_mmu decls to tcg/tcg-ldst.hRichard Henderson2-0/+2
2021-10-05tcg/s390x: Implement TCG_TARGET_HAS_cmpsel_vecRichard Henderson1-1/+23
2021-10-05tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson3-1/+22
2021-10-05tcg/s390x: Implement TCG_TARGET_HAS_sat_vecRichard Henderson2-0/+66
2021-10-05tcg/s390x: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson2-1/+26
2021-10-05tcg/s390x: Implement vector shift operationsRichard Henderson3-7/+99
2021-10-05tcg/s390x: Implement TCG_TARGET_HAS_mul_vecRichard Henderson2-1/+8
2021-10-05tcg/s390x: Implement andc, orc, abs, neg, not vector operationsRichard Henderson3-5/+39
2021-10-05tcg/s390x: Implement minimal vector operationsRichard Henderson1-4/+150
2021-10-05tcg/s390x: Implement tcg_out_dup*_vecRichard Henderson1-3/+119
2021-10-05tcg/s390x: Implement tcg_out_mov for vector typesRichard Henderson1-4/+68
2021-10-05tcg/s390x: Implement tcg_out_ld/st for vector typesRichard Henderson1-12/+120
2021-10-05tcg/s390x: Add host vector frameworkRichard Henderson5-5/+184
2021-10-05tcg/s390x: Merge TCG_AREG0 and TCG_REG_CALL_STACK into TCGRegRichard Henderson1-21/+7
2021-10-05tcg/s390x: Change FACILITY representationRichard Henderson2-51/+52
2021-10-05tcg/s390x: Rename from tcg/s390Richard Henderson4-0/+0
2021-10-05tcg: Expand usadd/ussub with umin/umaxRichard Henderson1-2/+35
2021-10-05trace: Split guest_mem_beforeRichard Henderson1-13/+4
2021-10-05plugins: Reorg arguments to qemu_plugin_vcpu_mem_cbRichard Henderson1-9/+21
2021-10-05trace/mem: Pass MemOpIdx to trace_mem_get_infoRichard Henderson1-4/+4
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson13-59/+59
2021-10-05tcg: Expand MO_SIZE to 3 bitsRichard Henderson9-29/+32
2021-09-21tcg/riscv: Remove add with zero on user-only memory accessRichard Henderson1-8/+2
2021-09-21tcg/sparc: Introduce tcg_out_mov_delayRichard Henderson1-6/+15
2021-09-21tcg/sparc: Drop inline markersRichard Henderson1-23/+22
2021-09-21tcg/mips: Drop special alignment for code_gen_bufferRichard Henderson1-91/+0
2021-09-21tcg/mips: Unset TCG_TARGET_HAS_direct_jumpRichard Henderson2-25/+10
2021-09-21tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subrRichard Henderson1-2/+4
2021-09-21tcg/mips: Drop inline markersRichard Henderson1-49/+27
2021-09-14tcg/arm: More use of the TCGReg enumRichard Henderson1-30/+35
2021-09-14tcg/arm: More use of the ARMInsn enumRichard Henderson1-10/+10
2021-09-14tcg/arm: Give enum arm_cond_code_e a typedef and use itRichard Henderson1-68/+68
2021-09-14tcg/arm: Drop inline markersRichard Henderson1-120/+114
2021-09-14tcg/arm: Simplify usage of encode_immRichard Henderson1-64/+77
2021-09-14tcg/arm: Split out tcg_out_ldstmRichard Henderson1-2/+17
2021-09-14tcg/arm: Support armv4t in tcg_out_goto and tcg_out_callRichard Henderson1-15/+34
2021-09-14tcg/arm: Simplify use_armv5t_instructionsRichard Henderson1-7/+1
2021-09-14tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}Richard Henderson1-16/+22
2021-09-14tcg/arm: Remove fallback definition of __ARM_ARCHRichard Henderson1-19/+0
2021-09-14tcg/arm: Fix tcg_out_vec_op function signatureJose R. Ziviani1-1/+2
2021-09-14tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELFRichard Henderson1-3/+18
2021-09-14tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWINRichard Henderson1-4/+4
2021-09-14tcg/i386: Split P_VEXW from P_REXWRichard Henderson1-6/+7
2021-07-21accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTRRichard Henderson1-16/+12
2021-07-21accel/tcg: Standardize atomic helpers on softmmu apiRichard Henderson1-39/+12
2021-07-12Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...Peter Maydell12-44/+14
2021-07-09tcg: Remove TCG_TARGET_HAS_goto_ptrRichard Henderson11-16/+3
2021-07-09tcg: Fix prologue disassemblyRichard Henderson1-2/+2
2021-07-09misc: Fix "havn't" typoPhilippe Mathieu-Daudé3-5/+9
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