aboutsummaryrefslogtreecommitdiff
path: root/tcg/sparc
AgeCommit message (Expand)AuthorFilesLines
2011-11-19tcg-sparc: Fix set-but-not used warnings.Richard Henderson1-4/+0
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson1-6/+7
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson1-2/+2
2011-10-01tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.hStefan Weil1-6/+0
2011-09-17tcg/sparc: Only one call output register needed for 64 bit hostsStefan Weil1-2/+4
2011-08-21tcg: Always define all of the TCGOpcode enum members.Richard Henderson1-33/+35
2011-06-26TCG/Sparc64: use stack for TCG tempsBlue Swirl1-3/+4
2011-06-26Delegate setup of TCG temporaries to targetsBlue Swirl1-0/+2
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl1-2/+2
2010-06-16tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.Richard Henderson1-0/+4
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson1-2/+2
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson1-5/+5
2010-04-05Split TLB addend and target_phys_addr_tPaul Brook1-7/+1
2010-03-26tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.Richard Henderson1-1/+5
2010-03-26tcg: Allow target-specific implementation of NOR.Richard Henderson1-0/+2
2010-03-26tcg: Allow target-specific implementation of NAND.Richard Henderson1-0/+2
2010-03-26tcg: Allow target-specific implementation of EQV.Richard Henderson1-0/+2
2010-03-26tcg: Use TCGCond where appropriate.Richard Henderson1-6/+6
2010-03-26tcg: Name the opcode enumeration.Richard Henderson1-1/+1
2010-03-26remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]Paolo Bonzini1-7/+1
2010-03-13Fix Sparc host build breakageBlue Swirl1-0/+8
2010-02-22tcg: fix build on 32-bit hppa, ppc and sparc hostsJay Foad1-0/+4
2010-02-20tcg: Add comments for all optional instructions not implemented.Richard Henderson1-6/+16
2010-02-20tcg-sparc: Implement ORC.Richard Henderson2-0/+7
2010-02-20tcg-sparc: Implement ANDC.Richard Henderson2-0/+8
2010-02-20tcg-sparc: Implement not.Richard Henderson2-0/+8
2010-02-20tcg-sparc: Implement neg.Richard Henderson2-2/+16
2010-02-16tcg-sparc: Implement setcond, setcond2.Richard Henderson1-0/+127
2010-01-12tcg-sparc: Implement ext32[su]_i64Richard Henderson2-0/+21
2010-01-12tcg-sparc: Implement division properly.Richard Henderson2-30/+55
2010-01-12tcg-sparc: Do not remove %o[012] from 'r' constraint.Richard Henderson1-0/+3
2010-01-12tcg-sparc: Implement add2, sub2, mulu2.Richard Henderson1-0/+27
2010-01-12tcg-sparc: Add tcg_out_arithc.Richard Henderson1-43/+43
2009-12-21tcg-sparc: Implement brcond2.Richard Henderson1-14/+69
2009-12-21tcg-sparc: Use TCG_TARGET_REG_BITS in conditional compilation.Richard Henderson1-16/+16
2009-12-21tcg-sparc: Improve tcg_out_movi for sparc64.Richard Henderson1-12/+15
2009-12-21tcg-sparc: Fix imm13 check in movi.Richard Henderson1-1/+1
2009-07-27change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela1-1/+1
2009-04-04Fix branches and TLB matches for 64 bit targetsblueswir11-13/+75
2009-04-04Allocate space for static call args, increase stack frame size on Sparc64blueswir12-9/+17
2009-03-13tcg: rename bswap_i32/i64 functionsaurel321-2/+2
2009-03-08Prune unused TCG_AREGsblueswir11-3/+0
2008-10-05Add some missing static and const qualifiers, reg_names only used if NDEBUG setblueswir11-0/+2
2008-09-13Use 64 bit loads for tlb addend only if addend size is 64 bitsblueswir11-2/+8
2008-09-13Fix stack alignment on Sparc32 hostblueswir11-1/+2
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-9/+1
2008-08-17Fix 64 bit constant generationblueswir11-5/+12
2008-08-17Fix 32 bit address overflowblueswir11-0/+19
2008-08-17Restore AREG0 after callsblueswir11-73/+64
2008-08-16Sparc code generator update (fix qemu_ld & qemu_st)blueswir11-129/+101
generated by cgit v1.1 at 2024-11-03 10:51:20 +0000