riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-10-08	tcg: Remove TCG_CT_REG	Richard Henderson	1	-2/+0
2020-10-08	tcg: Drop union from TCGArgConstraint	Richard Henderson	1	-7/+7
2020-08-21	meson: rename included C source files to .c.inc	Paolo Bonzini	1	-2/+2
2020-07-13	tcg/riscv: Remove superfluous breaks	Liao Pingfang	1	-2/+0
2020-01-15	tcg: Search includes in the parent source directory	Philippe Mathieu-Daudé	1	-2/+2
2019-09-03	tcg: TCGMemOp is now accelerator independent MemOp	Tony Nguyen	1	-10/+10
2019-07-09	tcg/riscv: Fix RISC-VH host build failure	Alistair Francis	1	-2/+2
2019-06-10	cpu: Move the softmmu tlb to CPUNegativeOffsetState	Richard Henderson	1	-24/+7
2019-06-10	tcg: Create struct CPUTLB	Richard Henderson	1	-10/+2
2019-05-13	tcg: Return bool success from tcg_out_mov	Richard Henderson	1	-2/+3
2019-04-24	tcg: Restart TB generation after out-of-line ldst overflow	Richard Henderson	1	-4/+12
2019-04-24	tcg: Add INDEX_op_extract2_{i32,i64}	Richard Henderson	1	-0/+2
2019-01-28	cputlb: Remove static tlb sizing	Richard Henderson	1	-1/+0
2019-01-28	tcg/riscv: enable dynamic TLB sizing	Richard Henderson	2	-71/+55
2019-01-28	tcg: introduce dynamic TLB sizing	Emilio G. Cota	1	-0/+1
2018-12-26	tcg/riscv: Add the target init code	Alistair Francis	1	-0/+31
2018-12-26	tcg/riscv: Add the prologue generation and register the JIT	Alistair Francis	1	-0/+111
2018-12-26	tcg/riscv: Add the out op decoder	Alistair Francis	1	-0/+496
2018-12-26	tcg/riscv: Add direct load and store instructions	Alistair Francis	1	-0/+158
2018-12-26	tcg/riscv: Add slowpath load and store instructions	Alistair Francis	1	-0/+256
2018-12-26	tcg/riscv: Add branch and jump instructions	Alistair Francis	1	-0/+145
2018-12-26	tcg/riscv: Add the add2 and sub2 instructions	Alistair Francis	1	-0/+55
2018-12-26	tcg/riscv: Add the out load and store instructions	Alistair Francis	1	-0/+65
2018-12-26	tcg/riscv: Add the extract instructions	Alistair Francis	1	-0/+34
2018-12-26	tcg/riscv: Add the mov and movi instruction	Alistair Francis	1	-0/+86
2018-12-26	tcg/riscv: Add the relocation functions	Alistair Francis	1	-0/+88
2018-12-26	tcg/riscv: Add the instruction emitters	Alistair Francis	1	-0/+48
2018-12-26	tcg/riscv: Add the immediate encoders	Alistair Francis	1	-0/+90
2018-12-26	tcg/riscv: Add support for the constraints	Alistair Francis	1	-0/+168
2018-12-26	tcg/riscv: Add the tcg target registers	Alistair Francis	1	-0/+118
2018-12-26	tcg/riscv: Add the tcg-target.h file	Alistair Francis	1	-0/+177