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path: root/tcg/riscv/tcg-target.c.inc
AgeCommit message (Expand)AuthorFilesLines
2023-05-16tcg: Add page_bits and page_mask to TCGContextRichard Henderson1-2/+2
2023-05-16tcg: Split INDEX_op_qemu_{ld,st}* for guest address sizeRichard Henderson1-8/+16
2023-05-16tcg/riscv: Use atom_and_align_for_opcRichard Henderson1-5/+8
2023-05-16tcg: Introduce tcg_target_has_memory_bswapRichard Henderson1-0/+5
2023-05-16tcg/riscv: Support softmmu unaligned accessesRichard Henderson1-20/+28
2023-05-16tcg/riscv: Use full load/store helpers in user-only modeRichard Henderson1-29/+0
2023-05-16tcg: Unify helper_{be,le}_{ld,st}*Richard Henderson1-42/+0
2023-05-11tcg/riscv: Simplify constraints on qemu_ld/stRichard Henderson1-13/+3
2023-05-11tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_pathRichard Henderson1-27/+10
2023-05-11tcg/riscv: Introduce prepare_host_addrRichard Henderson1-139/+114
2023-05-05tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}Richard Henderson1-42/+24
2023-05-05tcg/riscv: Require TCG_TARGET_REG_BITS == 64Richard Henderson1-169/+63
2023-04-23tcg/riscv: Conditionalize tcg_out_exts_i32_i64Richard Henderson1-1/+3
2023-04-23tcg: Introduce tcg_out_xchgRichard Henderson1-0/+5
2023-04-23tcg: Introduce tcg_out_movextRichard Henderson1-11/+2
2023-04-23tcg: Split out tcg_out_extrl_i64_i32Richard Henderson1-4/+6
2023-04-23tcg: Split out tcg_out_extu_i32_i64Richard Henderson1-4/+6
2023-04-23tcg: Split out tcg_out_exts_i32_i64Richard Henderson1-1/+6
2023-04-23tcg: Split out tcg_out_ext32uRichard Henderson1-1/+1
2023-04-23tcg: Split out tcg_out_ext32sRichard Henderson1-1/+1
2023-04-23tcg: Split out tcg_out_ext16uRichard Henderson1-5/+2
2023-04-23tcg: Split out tcg_out_ext16sRichard Henderson1-6/+3
2023-04-23tcg: Split out tcg_out_ext8uRichard Henderson1-5/+2
2023-04-23tcg: Split out tcg_out_ext8sRichard Henderson1-6/+3
2023-02-04tcg: Introduce tcg_target_call_oarg_regRichard Henderson1-4/+6
2023-02-04tcg: Introduce tcg_out_addi_ptrRichard Henderson1-0/+7
2023-01-20tcg/riscv: Use tcg_pcrel_diff in tcg_out_ldstRichard Henderson1-1/+1
2023-01-17tcg/riscv: Implement direct branch for goto_tbRichard Henderson1-2/+17
2023-01-17tcg/riscv: Introduce OPC_NOPRichard Henderson1-1/+2
2023-01-17tcg: Remove TCG_TARGET_HAS_direct_jumpRichard Henderson1-1/+0
2023-01-17tcg: Always define tb_target_set_jmp_targetRichard Henderson1-0/+6
2023-01-17tcg: Split out tcg_out_goto_tbRichard Henderson1-9/+11
2023-01-17tcg: Introduce get_jmp_target_addrRichard Henderson1-1/+1
2023-01-17tcg: Replace asserts on tcg_jmp_insn_offsetRichard Henderson1-1/+1
2023-01-17tcg: Split out tcg_out_exit_tbRichard Henderson1-10/+12
2023-01-06Merge tag 'pull-riscv-to-apply-20230106' of https://github.com/alistair23/qem...Peter Maydell1-22/+46
2023-01-06tcg/riscv: Fix base register for user-only qemu_ld/stRichard Henderson1-17/+22
2023-01-06tcg/riscv: Fix reg overlap case in tcg_out_addsub2Richard Henderson1-2/+8
2023-01-06tcg/riscv: Fix range matched by TCG_CT_CONST_M12Richard Henderson1-3/+16
2023-01-05tcg: Add TCGHelperInfo argument to tcg_out_callRichard Henderson1-3/+4
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau1-2/+2
2022-02-09tcg/riscv: Support raising sigbus for user-onlyRichard Henderson1-2/+61
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot1-3/+3
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson1-8/+8
2021-10-05tcg: Expand MO_SIZE to 3 bitsRichard Henderson1-2/+2
2021-09-21tcg/riscv: Remove add with zero on user-only memory accessRichard Henderson1-8/+2
2021-06-29tcg/riscv: Remove MO_BSWAP handlingRichard Henderson1-31/+33
2021-06-04tcg: Change parameters for tcg_target_const_matchRichard Henderson1-3/+1
2021-03-17tcg: Fix prototypes for tcg_out_vec_op and tcg_out_opMiroslav Rezanina1-1/+2
2021-02-02tcg/riscv: Split out constraint sets to tcg-target-con-set.hRichard Henderson1-60/+23
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