aboutsummaryrefslogtreecommitdiff
path: root/tcg/ppc
AgeCommit message (Expand)AuthorFilesLines
2019-10-14tcg/ppc: Update vector support for v3.00 dup/dupiRichard Henderson1-2/+26
2019-10-14tcg/ppc: Update vector support for v3.00 load/storeRichard Henderson1-9/+38
2019-10-14tcg/ppc: Update vector support for v3.00 AltivecRichard Henderson2-1/+24
2019-10-14tcg/ppc: Update vector support for v2.07 FPRichard Henderson1-6/+26
2019-10-14tcg/ppc: Update vector support for v2.07 VSXRichard Henderson1-0/+11
2019-10-14tcg/ppc: Update vector support for v2.07 AltivecRichard Henderson2-22/+67
2019-10-14tcg/ppc: Update vector support for VSXRichard Henderson2-6/+51
2019-10-14tcg/ppc: Enable Altivec detectionRichard Henderson1-0/+4
2019-10-14tcg/ppc: Support vector dup2Richard Henderson1-0/+9
2019-10-14tcg/ppc: Support vector multiplyRichard Henderson3-2/+121
2019-10-14tcg/ppc: Support vector shift by immediateRichard Henderson2-3/+57
2019-10-14tcg/ppc: Add support for vector saturated add/subtractRichard Henderson2-1/+37
2019-10-14tcg/ppc: Add support for vector add/subtractRichard Henderson1-0/+20
2019-10-14tcg/ppc: Add support for vector maximum/minimumRichard Henderson2-2/+40
2019-10-14tcg/ppc: Add support for load/store/logic/comparisonRichard Henderson2-34/+440
2019-10-14tcg/ppc: Enable tcg backend vector compilationRichard Henderson3-3/+89
2019-10-14tcg/ppc: Replace HAVE_ISEL macro with a variableRichard Henderson1-5/+12
2019-10-14tcg/ppc: Replace HAVE_ISA_2_06Richard Henderson1-3/+2
2019-10-14tcg/ppc: Create TCGPowerISA and have_isaRichard Henderson2-6/+14
2019-10-14tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC()Richard Henderson1-0/+5
2019-10-14tcg/ppc: Introduce macro VX4()Richard Henderson1-0/+1
2019-10-14tcg/ppc: Introduce Altivec registersRichard Henderson2-34/+65
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-6/+6
2019-06-10cpu: Move the softmmu tlb to CPUNegativeOffsetStateRichard Henderson1-21/+9
2019-06-10tcg: Create struct CPUTLBRichard Henderson1-6/+2
2019-05-13tcg: Return bool success from tcg_out_movRichard Henderson1-1/+2
2019-04-24tcg/ppc: Allow the constant pool to overflow at 32kRichard Henderson1-18/+10
2019-04-24tcg: Restart TB generation after out-of-line ldst overflowRichard Henderson1-4/+10
2019-04-24tcg: Add INDEX_op_extract2_{i32,i64}Richard Henderson1-0/+2
2019-01-28cputlb: Remove static tlb sizingRichard Henderson1-1/+0
2019-01-28tcg/ppc: enable dynamic TLB sizingRichard Henderson2-44/+55
2019-01-28tcg: introduce dynamic TLB sizingEmilio G. Cota1-0/+1
2018-12-17tcg: Add TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson1-0/+1
2018-12-17tcg/ppc: Return false on failure from patch_relocRichard Henderson1-11/+21
2018-12-17tcg: Return success from patch_relocRichard Henderson1-1/+2
2018-12-17tcg/ppc: Fold away "noaddr" branch routinesRichard Henderson1-18/+7
2018-06-15tcg: Reduce max TB opcode countRichard Henderson1-2/+2
2018-01-16tcg/ppc: Allow a 32-bit offset to the constant poolRichard Henderson1-28/+39
2018-01-16tcg/ppc: Support tlb offsets larger than 64kRichard Henderson1-9/+8
2017-09-17tcg/ppc: Fully convert tcg_target_op_defRichard Henderson1-153/+168
2017-09-17tcg: Remove tcg_regset_set32Richard Henderson1-18/+19
2017-09-17tcg: Remove tcg_regset_clearRichard Henderson1-1/+1
2017-09-17tcg/ppc: disable atomic write check on ppc32Philippe Mathieu-Daudé1-1/+3
2017-09-07tcg/ppc: Use constant pool for moviRichard Henderson2-4/+31
2017-09-07tcg/ppc: Look for shifted constantsRichard Henderson1-10/+48
2017-09-07tcg/ppc: Change TCG_REG_RA to TCG_REG_TBRichard Henderson1-151/+122
2017-09-07tcg: Rearrange ldst label trackingRichard Henderson2-2/+6
2017-09-07tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.hRichard Henderson2-2/+6
2017-09-05tcg: Add tcg target default memory orderingPranith Kumar1-0/+2
2017-06-19util: add cacheinfoEmilio G. Cota1-69/+2
generated by cgit v1.1 at 2024-11-04 22:25:39 +0000