aboutsummaryrefslogtreecommitdiff
path: root/tcg/loongarch64
AgeCommit message (Expand)AuthorFilesLines
2023-02-04tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128Richard Henderson1-0/+2
2023-02-04tcg: Introduce tcg_target_call_oarg_regRichard Henderson1-4/+6
2023-02-04tcg: Introduce tcg_out_addi_ptrRichard Henderson1-0/+7
2023-01-23tcg/loongarch64: Reorg goto_tb implementationRichard Henderson2-46/+33
2023-01-23tcg/loongarch64: Use tcg_pcrel_diff in tcg_out_ldstRichard Henderson1-1/+1
2023-01-23tcg/loongarch64: Implement movcondRichard Henderson3-2/+36
2023-01-23tcg/loongarch64: Improve setcond expansionRichard Henderson1-42/+107
2023-01-23tcg/loongarch64: Introduce tcg_out_addiRichard Henderson3-10/+53
2023-01-23tcg/loongarch64: Update tcg-insn-defs.c.incRichard Henderson1-1/+9
2023-01-23tcg/loongarch64: Optimize immediate loadingRui Wang1-23/+12
2023-01-17tcg: Remove TCG_TARGET_HAS_direct_jumpRichard Henderson1-1/+0
2023-01-17tcg: Move tb_target_set_jmp_target declaration to tcg.hRichard Henderson1-3/+0
2023-01-17tcg: Change tb_target_set_jmp_target argumentsRichard Henderson2-3/+5
2023-01-17tcg: Split out tcg_out_goto_tbRichard Henderson1-18/+20
2023-01-17tcg: Introduce set_jmp_insn_offsetRichard Henderson1-2/+1
2023-01-17tcg: Replace asserts on tcg_jmp_insn_offsetRichard Henderson1-1/+1
2023-01-17tcg: Split out tcg_out_exit_tbRichard Henderson1-10/+12
2023-01-05tcg: Add TCGHelperInfo argument to tcg_out_callRichard Henderson1-3/+4
2023-01-05tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32Richard Henderson1-0/+1
2023-01-05tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64Richard Henderson1-1/+1
2022-10-25tcg/loongarch64: Add direct jump supportQi Hu2-7/+50
2022-02-09tcg/loongarch64: Support raising sigbus for user-onlyWANG Xuerui2-4/+69
2022-02-09tcg/loongarch64: Fix fallout from recent MO_Q renamingWANG Xuerui1-1/+1
2021-12-21tcg/loongarch64: Register the JITWANG Xuerui1-0/+44
2021-12-21tcg/loongarch64: Implement tcg_target_initWANG Xuerui1-0/+27
2021-12-21tcg/loongarch64: Implement exit_tb/goto_tbWANG Xuerui1-0/+19
2021-12-21tcg/loongarch64: Implement tcg_target_qemu_prologueWANG Xuerui1-0/+68
2021-12-21tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st opsWANG Xuerui2-0/+355
2021-12-21tcg/loongarch64: Implement simple load/store opsWANG Xuerui2-0/+132
2021-12-21tcg/loongarch64: Implement tcg_out_callWANG Xuerui1-0/+34
2021-12-21tcg/loongarch64: Implement setcond opsWANG Xuerui2-0/+70
2021-12-21tcg/loongarch64: Implement br/brcond opsWANG Xuerui2-0/+54
2021-12-21tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu opsWANG Xuerui3-8/+74
2021-12-21tcg/loongarch64: Implement add/sub opsWANG Xuerui2-0/+40
2021-12-21tcg/loongarch64: Implement shl/shr/sar/rotl/rotr opsWANG Xuerui3-2/+94
2021-12-21tcg/loongarch64: Implement clz/ctz opsWANG Xuerui3-4/+47
2021-12-21tcg/loongarch64: Implement bswap{16,32,64} opsWANG Xuerui2-5/+37
2021-12-21tcg/loongarch64: Implement deposit/extract opsWANG Xuerui3-4/+26
2021-12-21tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc opsWANG Xuerui3-8/+98
2021-12-21tcg/loongarch64: Implement sign-/zero-extension opsWANG Xuerui3-12/+95
2021-12-21tcg/loongarch64: Implement goto_ptrWANG Xuerui2-0/+32
2021-12-21tcg/loongarch64: Implement tcg_out_mov and tcg_out_moviWANG Xuerui1-0/+137
2021-12-21tcg/loongarch64: Implement the memory barrier opWANG Xuerui1-0/+32
2021-12-21tcg/loongarch64: Implement necessary relocation operationsWANG Xuerui1-0/+66
2021-12-21tcg/loongarch64: Define the operand constraintsWANG Xuerui2-0/+80
2021-12-21tcg/loongarch64: Add register names, allocation order and input/output setsWANG Xuerui1-0/+118
2021-12-21tcg/loongarch64: Add generated instruction opcodes and encoding helpersWANG Xuerui1-0/+979
2021-12-21tcg/loongarch64: Add the tcg-target.h fileWANG Xuerui1-0/+180
generated by cgit v1.1 at 2024-11-17 10:04:40 +0000