aboutsummaryrefslogtreecommitdiff
path: root/tcg/i386
AgeCommit message (Expand)AuthorFilesLines
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-2/+2
2020-06-02tcg/i386: Implement INDEX_op_rotl{i,s,v}_vecRichard Henderson1-16/+100
2020-06-02tcg: Implement gvec support for rotate by scalarRichard Henderson1-0/+1
2020-06-02tcg: Implement gvec support for rotate by vectorRichard Henderson1-0/+1
2020-06-02tcg: Implement gvec support for rotate by immediateRichard Henderson1-0/+1
2020-04-07tcg/i386: Fix %r12 guest_base initializationRichard Henderson1-1/+1
2020-03-30tcg/i386: Fix INDEX_op_dup2_vecRichard Henderson1-3/+7
2020-03-17tcg/i386: Bound shift count expanding sari_vecRichard Henderson1-3/+6
2020-01-15tcg: Search includes in the parent source directoryPhilippe Mathieu-Daudé1-2/+2
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2019-11-11tcg/i386/tcg-target.opc.h: Add copyright/licensePeter Maydell1-3/+25
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-12/+12
2019-06-10cpu: Move the softmmu tlb to CPUNegativeOffsetStateRichard Henderson1-2/+4
2019-06-10tcg: Create struct CPUTLBRichard Henderson1-2/+2
2019-05-22tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/storeRichard Henderson1-2/+22
2019-05-22tcg/i386: Use umin/umax in expanding unsigned compareRichard Henderson1-19/+61
2019-05-22tcg/i386: Remove expansion for missing minmaxRichard Henderson1-37/+0
2019-05-22tcg/i386: Support vector comparison select valueRichard Henderson2-5/+36
2019-05-22tcg: Add support for vector compare selectRichard Henderson1-0/+1
2019-05-22tcg: Add support for vector bitwise selectRichard Henderson1-0/+1
2019-05-22tcg/i386: Fix dupi/dupm for avx1 and 32-bit hostsRichard Henderson1-3/+4
2019-05-13tcg/i386: Support vector absolute valueRichard Henderson2-1/+16
2019-05-13tcg: Add support for vector absolute valueRichard Henderson1-0/+1
2019-05-13tcg/i386: Support vector scalar shift opcodesRichard Henderson2-1/+36
2019-05-13tcg/i386: Support vector variable shift opcodesRichard Henderson2-1/+36
2019-05-13tcg: Add INDEX_op_dupm_vecRichard Henderson1-0/+4
2019-05-13tcg/i386: Implement tcg_out_dupm_vecRichard Henderson1-14/+43
2019-05-13tcg: Add tcg_out_dupm_vec to the backend interfaceRichard Henderson1-0/+7
2019-05-13tcg: Manually expand INDEX_op_dup_vecRichard Henderson1-5/+3
2019-05-13tcg: Promote tcg_out_{dup,dupi}_vec to backend interfaceRichard Henderson1-1/+2
2019-05-13tcg: Return bool success from tcg_out_movRichard Henderson1-2/+3
2019-04-24tcg: Restart TB generation after out-of-line ldst overflowRichard Henderson1-2/+4
2019-04-24tcg/i386: Support INDEX_op_extract2_{i32,i64}Richard Henderson2-2/+13
2019-04-24tcg: Add INDEX_op_extract2_{i32,i64}Richard Henderson1-0/+2
2019-02-11tcg/i386: fix unsigned vector saturating arithmeticMark Cave-Ayland1-2/+2
2019-01-28cputlb: Remove static tlb sizingRichard Henderson1-1/+0
2019-01-28tcg/i386: enable dynamic TLB sizingEmilio G. Cota2-15/+15
2019-01-28tcg: introduce dynamic TLB sizingEmilio G. Cota1-0/+1
2019-01-28tcg/i386: Implement vector minmax arithmeticRichard Henderson2-1/+82
2019-01-28tcg/i386: Implement vector saturating arithmeticRichard Henderson2-1/+43
2019-01-28tcg/i386: Split subroutines out of tcg_expand_vec_opRichard Henderson1-219/+224
2019-01-28tcg: Add opcodes for vector minmax arithmeticRichard Henderson1-0/+1
2019-01-28tcg: Add opcodes for vector saturated arithmeticRichard Henderson1-0/+1
2019-01-11avoid TABs in files that only contain a fewPaolo Bonzini1-2/+2
2018-12-17tcg: Add TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson1-0/+2
2018-12-17tcg/i386: Add setup_guest_base_seg for FreeBSDRichard Henderson1-0/+9
2018-12-17tcg/i386: Precompute all guest_base parametersRichard Henderson1-61/+40
2018-12-17tcg/i386: Assume 32-bit values are zero-extendedRichard Henderson1-63/+40
2018-12-17tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guestsRichard Henderson2-2/+9
2018-12-17tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_pathRichard Henderson1-5/+8
generated by cgit v1.1 at 2024-11-18 12:38:53 +0000