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tcg
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i386
/
tcg-target.h
Age
Commit message (
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Author
Files
Lines
2018-02-08
tcg/i386: Add vector operations
Richard Henderson
1
-2
/
+39
2017-09-07
tcg/i386: Store out-of-range call targets in constant pool
Richard Henderson
1
-0
/
+1
2017-09-07
tcg: Rearrange ldst label tracking
Richard Henderson
1
-0
/
+4
2017-09-07
tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h
Richard Henderson
1
-0
/
+9
2017-06-05
tcg/i386: implement goto_ptr
Emilio G. Cota
1
-1
/
+1
2017-06-05
tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr
Emilio G. Cota
1
-0
/
+1
2017-02-24
tcg: enable MTTCG by default for ARM on x86 hosts
Alex Bennée
1
-0
/
+11
2017-01-10
tcg/i386: Handle ctpop opcode
Richard Henderson
1
-2
/
+3
2017-01-10
tcg: Add opcode for ctpop
Richard Henderson
1
-0
/
+2
2017-01-10
tcg/i386: Handle ctz and clz opcodes
Richard Henderson
1
-4
/
+4
2017-01-10
tcg: Add clz and ctz opcodes
Richard Henderson
1
-0
/
+4
2017-01-10
tcg/i386: Implement field extraction opcodes
Richard Henderson
1
-3
/
+9
2017-01-10
tcg: Add field extraction primitives
Richard Henderson
1
-0
/
+4
2016-07-12
tcg: Clean up tcg-target.h header guards
Markus Armbruster
1
-2
/
+3
2015-08-24
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Richard Henderson
1
-1
/
+2
2015-08-24
tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
Aurelien Jarno
1
-1
/
+1
2015-06-03
tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS
Paolo Bonzini
1
-0
/
+1
2014-06-04
tcg: Remove TCG_TARGET_HAS_new_ldst
Richard Henderson
1
-2
/
+0
2014-05-12
tcg-i386: Define TCG_TARGET_INSN_UNIT_SIZE
Richard Henderson
1
-0
/
+2
2014-04-28
tcg: Add INDEX_op_trunc_shr_i32
Richard Henderson
1
-0
/
+1
2014-04-18
tcg: Use HOST_WORDS_BIGENDIAN
Richard Henderson
1
-2
/
+0
2014-02-17
tcg/i386: Use ANDN instruction
Richard Henderson
1
-2
/
+4
2014-02-17
tcg/i386: Move TCG_CT_CONST_* to tcg-target.c
Richard Henderson
1
-3
/
+0
2013-10-12
tcg-i386: Support new ldst opcodes
Richard Henderson
1
-1
/
+1
2013-10-10
tcg: Add qemu_ld_st_i32/64
Richard Henderson
1
-0
/
+2
2013-09-02
tcg: Allow TCG_TARGET_REG_BITS to be specified independantly
Richard Henderson
1
-4
/
+6
2013-09-02
tcg: Change flush_icache_range arguments to uintptr_t
Richard Henderson
1
-2
/
+1
2013-09-02
tcg: Add muluh and mulsh opcodes
Richard Henderson
1
-0
/
+4
2013-02-23
tcg-i386: Implement multiword arithmetic ops
Richard Henderson
1
-5
/
+5
2013-02-23
tcg: Add signed multiword multiplication operations
Richard Henderson
1
-0
/
+2
2013-02-23
tcg: Add 64-bit multiword arithmetic operations
Richard Henderson
1
-0
/
+3
2013-02-23
tcg-i386: Always implement 32-bit multiword ops
Richard Henderson
1
-4
/
+3
2013-02-23
tcg: Make 32-bit multiword operations optional for 64-bit hosts
Richard Henderson
1
-0
/
+4
2012-12-29
tcg-i386: Perform cmov detection at runtime for 32-bit.
Richard Henderson
1
-5
/
+0
2012-12-19
janitor: add guards to headers
Paolo Bonzini
1
-0
/
+3
2012-10-12
tcg: Remove TCG_TARGET_HAS_GUEST_BASE define
Peter Maydell
1
-2
/
+0
2012-09-22
w64: Fix TCG helper functions with 5 arguments
Stefan Weil
1
-0
/
+4
2012-09-21
tcg-i386: Implement movcond
Richard Henderson
1
-1
/
+6
2012-09-21
tcg: Introduce movcond
Richard Henderson
1
-0
/
+2
2012-09-15
Remove unused CONFIG_TCG_PASS_AREG0 and dead code
Blue Swirl
1
-1
/
+0
2012-03-03
w64: Fix data type of parameters for flush_icache_range
Stefan Weil
1
-1
/
+2
2011-12-09
tcg: Remove redundant declarations of TCG_TARGET_REG_BITS
Stefan Weil
1
-5
/
+0
2011-11-14
tcg: Standardize on TCGReg as the enum for hard registers
Richard Henderson
1
-2
/
+2
2011-10-01
tcg-i386: Introduce limited deposit support
Jan Kiszka
1
-2
/
+7
2011-08-21
tcg: Always define all of the TCGOpcode enum members.
Richard Henderson
1
-33
/
+35
2010-06-10
tcg-i386: Merge 64-bit generation.
Richard Henderson
1
-3
/
+58
2010-03-26
tcg: Allow target-specific implementation of NOR.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Allow target-specific implementation of NAND.
Richard Henderson
1
-0
/
+1
2010-03-26
tcg: Allow target-specific implementation of EQV.
Richard Henderson
1
-0
/
+1
2010-03-26
remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]
Paolo Bonzini
1
-2
/
+0
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