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AgeCommit message (Expand)AuthorFilesLines
2021-06-13tcg/arm: Fix tcg_out_op function signatureJose R. Ziviani1-1/+2
2021-06-11tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.hRichard Henderson1-0/+1
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_rotv_vecRichard Henderson1-1/+34
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_roti_vecRichard Henderson3-0/+17
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_shv_vecRichard Henderson2-1/+63
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson3-3/+22
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson2-1/+25
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_sat_vecRichard Henderson2-1/+25
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_mul_vecRichard Henderson2-1/+7
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_shi_vecRichard Henderson2-1/+28
2021-06-04tcg/arm: Implement andc, orc, abs, neg, not vector operationsRichard Henderson3-5/+44
2021-06-04tcg/arm: Implement minimal vector operationsRichard Henderson4-6/+202
2021-06-04tcg/arm: Implement tcg_out_dup*_vecRichard Henderson1-8/+275
2021-06-04tcg/arm: Implement tcg_out_mov for vector typesRichard Henderson1-6/+46
2021-06-04tcg/arm: Implement tcg_out_ld/st for vector typesRichard Henderson1-6/+64
2021-06-04tcg/arm: Add host vector frameworkRichard Henderson5-24/+158
2021-06-04tcg: Change parameters for tcg_target_const_matchRichard Henderson1-4/+1
2021-02-02tcg: Remove TCG_TARGET_CON_SET_HRichard Henderson1-1/+0
2021-02-02tcg/arm: Split out constraint sets to tcg-target-con-set.hRichard Henderson3-63/+69
2021-02-02tcg: Remove TCG_TARGET_CON_STR_HRichard Henderson1-1/+0
2021-02-02tcg/arm: Split out target constraints to tcg-target-con-str.hRichard Henderson3-56/+41
2021-01-13tcg: Remove movi and dupi opcodesRichard Henderson1-1/+0
2021-01-07tcg: Constify TCGLabelQemuLdst.raddrRichard Henderson1-2/+1
2021-01-07tcg: Constify tcg_code_gen_epilogueRichard Henderson1-2/+1
2021-01-07tcg: Remove TCG_TARGET_SUPPORT_MIRRORRichard Henderson1-1/+0
2021-01-07tcg/arm: Support split-wx code generationRichard Henderson2-17/+22
2021-01-07tcg: Add --accel tcg,split-wx propertyRichard Henderson1-0/+1
2021-01-07tcg: Adjust tb_target_set_jmp_target for split-wxRichard Henderson1-1/+1
2021-01-07tcg: Adjust tcg_register_jit for constRichard Henderson1-1/+1
2021-01-07tcg: Adjust tcg_out_call for constRichard Henderson1-1/+1
2021-01-07tcg: Adjust TCGLabel for constRichard Henderson1-1/+1
2021-01-07tcg: Move tcg epilogue pointer out of TCGContextRichard Henderson1-1/+1
2021-01-07tcg: Introduce INDEX_op_qemu_st8_i32Richard Henderson1-0/+1
2021-01-02util: Extract flush_icache_range to cacheflush.cRichard Henderson1-5/+0
2020-10-08tcg: Remove TCG_CT_REGRichard Henderson1-3/+0
2020-10-08tcg: Drop union from TCGArgConstraintRichard Henderson1-13/+13
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-2/+2
2020-02-28tcg/arm: Expand epilogue inlineRichard Henderson1-10/+2
2020-02-28tcg/arm: Split out tcg_out_epilogueRichard Henderson1-8/+11
2020-01-15tcg: Search includes in the parent source directoryPhilippe Mathieu-Daudé1-2/+2
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-13/+13
2019-06-10tcg/arm: Remove mostly unreachable tlb special caseRichard Henderson1-11/+12
2019-06-10tcg/arm: Use LDRD to load tlb mask+tableRichard Henderson1-26/+40
2019-06-10cpu: Move the softmmu tlb to CPUNegativeOffsetStateRichard Henderson1-32/+8
2019-06-10tcg: Create struct CPUTLBRichard Henderson1-7/+3
2019-05-13tcg: Return bool success from tcg_out_movRichard Henderson1-1/+2
2019-05-13tcg/arm: Use tcg_out_mov_reg in tcg_out_movRichard Henderson1-1/+1
2019-04-25tcg/arm: Restrict constant pool displacement to 12 bitsRichard Henderson1-36/+21
2019-04-24tcg: Restart TB generation after out-of-line ldst overflowRichard Henderson1-6/+10
2019-04-24tcg/arm: Support INDEX_op_extract2_i32Richard Henderson2-1/+26
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