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path: root/tcg/arm/tcg-target.c.inc
AgeCommit message (Expand)AuthorFilesLines
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau1-2/+2
2022-03-14tcg/arm: Don't emit UNPREDICTABLE LDRD with Rm == Rt or Rt+1Richard Henderson1-2/+15
2022-02-09tcg/arm: Support raising sigbus for user-onlyRichard Henderson1-2/+81
2022-02-09tcg/arm: Reserve a register for guest_baseRichard Henderson1-11/+28
2022-02-09tcg/arm: Support unaligned access for softmmuRichard Henderson1-20/+21
2022-02-09tcg/arm: Check alignment for ldrd and strdRichard Henderson1-15/+8
2022-02-09tcg/arm: Remove use_armv6_instructionsRichard Henderson1-165/+27
2022-02-09tcg/arm: Remove use_armv5t_instructionsRichard Henderson1-29/+6
2022-02-09tcg/arm: Drop support for armv4 and armv5 hostsRichard Henderson1-0/+5
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot1-5/+5
2021-12-07tcg/arm: Reduce vector alignment requirement for NEONRichard Henderson1-4/+9
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson1-5/+5
2021-10-05tcg: Expand MO_SIZE to 3 bitsRichard Henderson1-2/+2
2021-09-14tcg/arm: More use of the TCGReg enumRichard Henderson1-30/+35
2021-09-14tcg/arm: More use of the ARMInsn enumRichard Henderson1-10/+10
2021-09-14tcg/arm: Give enum arm_cond_code_e a typedef and use itRichard Henderson1-68/+68
2021-09-14tcg/arm: Drop inline markersRichard Henderson1-120/+114
2021-09-14tcg/arm: Simplify usage of encode_immRichard Henderson1-64/+77
2021-09-14tcg/arm: Split out tcg_out_ldstmRichard Henderson1-2/+17
2021-09-14tcg/arm: Support armv4t in tcg_out_goto and tcg_out_callRichard Henderson1-15/+34
2021-09-14tcg/arm: Standardize on tcg_out_<branch>_{reg,imm}Richard Henderson1-16/+22
2021-09-14tcg/arm: Fix tcg_out_vec_op function signatureJose R. Ziviani1-1/+2
2021-07-09misc: Fix "havn't" typoPhilippe Mathieu-Daudé1-2/+4
2021-06-29tcg/arm: Unset TCG_TARGET_HAS_MEMORY_BSWAPRichard Henderson1-138/+76
2021-06-29tcg/arm: Support bswap flagsRichard Henderson1-38/+63
2021-06-13tcg/arm: Fix tcg_out_op function signatureJose R. Ziviani1-1/+2
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_rotv_vecRichard Henderson1-1/+34
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_roti_vecRichard Henderson1-0/+15
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_shv_vecRichard Henderson1-1/+60
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson1-2/+20
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson1-0/+24
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_sat_vecRichard Henderson1-0/+24
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_mul_vecRichard Henderson1-0/+6
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_shi_vecRichard Henderson1-0/+27
2021-06-04tcg/arm: Implement andc, orc, abs, neg, not vector operationsRichard Henderson1-0/+38
2021-06-04tcg/arm: Implement minimal vector operationsRichard Henderson1-5/+192
2021-06-04tcg/arm: Implement tcg_out_dup*_vecRichard Henderson1-8/+275
2021-06-04tcg/arm: Implement tcg_out_mov for vector typesRichard Henderson1-6/+46
2021-06-04tcg/arm: Implement tcg_out_ld/st for vector typesRichard Henderson1-6/+64
2021-06-04tcg/arm: Add host vector frameworkRichard Henderson1-18/+99
2021-06-04tcg: Change parameters for tcg_target_const_matchRichard Henderson1-4/+1
2021-02-02tcg/arm: Split out constraint sets to tcg-target-con-set.hRichard Henderson1-63/+33
2021-02-02tcg/arm: Split out target constraints to tcg-target-con-str.hRichard Henderson1-56/+18
2021-01-13tcg: Remove movi and dupi opcodesRichard Henderson1-1/+0
2021-01-07tcg: Constify TCGLabelQemuLdst.raddrRichard Henderson1-2/+1
2021-01-07tcg: Constify tcg_code_gen_epilogueRichard Henderson1-2/+1
2021-01-07tcg/arm: Support split-wx code generationRichard Henderson1-16/+21
2021-01-07tcg: Adjust tcg_register_jit for constRichard Henderson1-1/+1
2021-01-07tcg: Adjust tcg_out_call for constRichard Henderson1-1/+1
2021-01-07tcg: Adjust TCGLabel for constRichard Henderson1-1/+1
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