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2015-09-02tcg/aarch64: Fix tcg_out_qemu_{ld, st} for guest_base == 0Richard Henderson1-7/+20
2015-08-24linux-user: remove useless macros GUEST_BASE and RESERVED_VALaurent Vivier1-5/+5
2015-08-24linux-user: remove --enable-guest-base/--disable-guest-baseLaurent Vivier1-6/+2
2015-08-24tcg/aarch64: Use softmmu fast path for unaligned accessesRichard Henderson1-13/+24
2015-08-24tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32Richard Henderson1-1/+2
2015-08-24tcg: implement real ext_i32_i64 and extu_i32_i64 opsAurelien Jarno1-0/+4
2015-08-24tcg: rename trunc_shr_i32 into trunc_shr_i64_i32Aurelien Jarno1-1/+1
2015-07-23tcg/aarch64: use 32-bit offset for 32-bit softmmu emulationRichard Henderson1-6/+6
2015-07-23tcg/aarch64: use 32-bit offset for 32-bit user-mode emulationPaolo Bonzini1-10/+16
2015-07-23tcg/aarch64: add ext argument to tcg_out_insn_3310Paolo Bonzini1-19/+22
2015-06-09tcg: Mask TCGMemOp appropriately for indexingRichard Henderson1-2/+2
2015-06-03tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITSPaolo Bonzini1-0/+1
2015-05-14tcg: Push merged memop+mmu_idx parameter to softmmu routinesRichard Henderson1-17/+18
2015-05-14tcg: Merge memop and mmu_idx parameters to qemu_ld/stRichard Henderson1-4/+8
2015-03-13tcg: Change generator-side labels to a pointerRichard Henderson1-9/+6
2014-09-29tcg-aarch64: Use 32-bit loads for qemu_ld_i32Richard Henderson1-12/+15
2014-06-04tcg: Remove TCG_TARGET_HAS_new_ldstRichard Henderson1-2/+0
2014-05-28tcg-aarch64: Make debug_frame constRichard Henderson1-13/+9
2014-05-12tcg: Remove unreachable code in tcg_out_op and op_defsRichard Henderson1-19/+3
2014-05-12tcg-aarch64: Define TCG_TARGET_INSN_UNIT_SIZERichard Henderson2-69/+53
2014-04-28tcg: Add INDEX_op_trunc_shr_i32Richard Henderson1-0/+1
2014-04-18tcg: Use HOST_WORDS_BIGENDIANRichard Henderson1-1/+0
2014-04-18tcg-aarch64: Remove w constraintRichard Henderson1-22/+18
2014-04-18tcg: Add TCGType parameter to tcg_target_const_matchRichard Henderson1-1/+1
2014-04-18tcg: Fix warning (1 bit signed bitfield entry) and replace int by boolStefan Weil1-3/+3
2014-04-16tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movrRichard Henderson1-9/+7
2014-04-16tcg-aarch64: Prefer unsigned offsets before signed offsets for ldstRichard Henderson1-5/+6
2014-04-16tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313Richard Henderson1-87/+89
2014-04-16tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_opRichard Henderson1-83/+32
2014-04-16tcg-aarch64: Introduce tcg_out_insn_3507Richard Henderson1-24/+33
2014-04-16tcg-aarch64: Support stores of zeroRichard Henderson1-16/+19
2014-04-16tcg-aarch64: Implement TCG_TARGET_HAS_new_ldstRichard Henderson2-60/+31
2014-04-16tcg-aarch64: Pass qemu_ld/st arguments directlyRichard Henderson1-32/+17
2014-04-16tcg-aarch64: Use TCGMemOp in qemu_ld/stRichard Henderson1-68/+63
2014-04-16tcg-aarch64: Use ADR to pass the return address to the ld/st helpersRichard Henderson1-2/+9
2014-04-16tcg-aarch64: Use tcg_out_call for qemu_ld/stRichard Henderson1-4/+2
2014-04-16tcg-aarch64: Avoid add with zero in tlb loadRichard Henderson1-9/+19
2014-04-16tcg-aarch64: Implement tcg_register_jitRichard Henderson1-15/+69
2014-04-16tcg-aarch64: Introduce tcg_out_insn_3314Richard Henderson1-67/+33
2014-04-16tcg-aarch64: Reuse LR in translated codeRichard Henderson2-33/+33
2014-04-16tcg-aarch64: Use CBZ and CBNZRichard Henderson1-2/+24
2014-04-16tcg-aarch64: Create tcg_out_brcondRichard Henderson1-20/+14
2014-04-16tcg-aarch64: Use symbolic names for branchesRichard Henderson1-31/+43
2014-04-16tcg-aarch64: Use adrp in tcg_out_moviRichard Henderson1-0/+23
2014-04-16tcg-aarch64: Special case small constants in tcg_out_moviRichard Henderson1-0/+10
2014-04-16tcg-aarch64: Use ORRI in tcg_out_moviRichard Henderson1-31/+39
2014-04-16tcg-aarch64: Use MOVN in tcg_out_moviRichard Henderson1-13/+50
2014-04-16tcg-aarch64: Use TCGType and TCGMemOp constantsRichard Henderson1-35/+38
2014-04-16tcg-aarch64: Use intptr_t apropriatelyRichard Henderson1-5/+5
2014-03-14tcg-aarch64: Introduce tcg_out_insn_3405Richard Henderson1-21/+27
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