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2020-07-02
target/riscv: vector widening integer multiply-add instructions
LIU Zhiwei
4
-0
/
+83
2020-07-02
target/riscv: vector single-width integer multiply-add instructions
LIU Zhiwei
4
-0
/
+139
2020-07-02
target/riscv: vector widening integer multiply instructions
LIU Zhiwei
4
-0
/
+84
2020-07-02
target/riscv: vector integer divide instructions
LIU Zhiwei
4
-0
/
+125
2020-07-02
target/riscv: vector single-width integer multiply instructions
LIU Zhiwei
4
-0
/
+214
2020-07-02
target/riscv: vector integer min/max instructions
LIU Zhiwei
4
-0
/
+122
2020-07-02
target/riscv: vector integer comparison instructions
LIU Zhiwei
4
-0
/
+246
2020-07-02
target/riscv: vector narrowing integer right shift instructions
LIU Zhiwei
4
-0
/
+123
2020-07-02
target/riscv: vector single-width bit shift instructions
LIU Zhiwei
4
-0
/
+165
2020-07-02
target/riscv: vector bitwise logical instructions
LIU Zhiwei
4
-0
/
+96
2020-07-02
target/riscv: vector integer add-with-carry / subtract-with-borrow instructions
LIU Zhiwei
4
-0
/
+294
2020-07-02
target/riscv: vector widening integer add and subtract
LIU Zhiwei
4
-0
/
+362
2020-07-02
target/riscv: vector single-width integer add and subtract
LIU Zhiwei
4
-0
/
+509
2020-07-02
target/riscv: add vector amo operations
LIU Zhiwei
6
-0
/
+339
2020-07-02
target/riscv: add fault-only-first unit stride load
LIU Zhiwei
4
-0
/
+212
2020-07-02
target/riscv: add vector index load and store instructions
LIU Zhiwei
4
-0
/
+293
2020-07-02
target/riscv: add vector stride load and store instructions
LIU Zhiwei
6
-0
/
+914
2020-07-02
target/riscv: add an internals.h header
LIU Zhiwei
1
-0
/
+24
2020-07-02
target/riscv: add vector configure instruction
LIU Zhiwei
7
-12
/
+210
2020-07-02
target/riscv: support vector extension csr
LIU Zhiwei
2
-1
/
+89
2020-07-02
target/riscv: implementation-defined constant parameters
LIU Zhiwei
2
-0
/
+12
2020-07-02
target/riscv: add vector extension field in CPURISCVState
LIU Zhiwei
2
-1
/
+14
2020-07-02
target/i386: sev: Use ram_block_discard_disable()
David Hildenbrand
1
-0
/
+7
2020-06-29
target/sparc: Translate flushw opcode
Giuseppe Musacchio
1
-0
/
+2
2020-06-27
hw/mips: Implement the kvm_type() hook in MachineClass
Huacai Chen
2
-0
/
+37
2020-06-26
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200626'...
Peter Maydell
21
-857
/
+4141
2020-06-26
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell
5
-216
/
+1319
2020-06-26
i386: Mask SVM features if nested SVM is disabled
Eduardo Habkost
1
-0
/
+4
2020-06-26
kvm: i386: allow TSC to differ by NTP correction bounds without TSC scaling
Marcelo Tosatti
1
-5
/
+41
2020-06-26
target/i386: Add notes for versioned CPU models
Tao Xu
1
-0
/
+5
2020-06-26
target/i386: reimplement fpatan using floatx80 operations
Joseph Myers
1
-4
/
+483
2020-06-26
target/i386: reimplement fyl2x using floatx80 operations
Joseph Myers
1
-111
/
+262
2020-06-26
target/i386: reimplement fyl2xp1 using floatx80 operations
Joseph Myers
1
-9
/
+202
2020-06-26
target/i386: reimplement fprem, fprem1 using floatx80 operations
Joseph Myers
1
-108
/
+48
2020-06-26
softfloat: merge floatx80_mod and floatx80_rem
Joseph Myers
2
-84
/
+0
2020-06-26
target/i386: reimplement f2xm1 using floatx80 operations
Joseph Myers
1
-3
/
+382
2020-06-26
target/arm: Enable MTE
Richard Henderson
1
-0
/
+5
2020-06-26
target/arm: Add allocation tag storage for system mode
Richard Henderson
1
-0
/
+131
2020-06-26
target/arm: Create tagged ram when MTE is enabled
Richard Henderson
2
-4
/
+54
2020-06-26
target/arm: Cache the Tagged bit for a page in MemTxAttrs
Richard Henderson
2
-3
/
+50
2020-06-26
target/arm: Always pass cacheattr to get_phys_addr
Richard Henderson
4
-36
/
+42
2020-06-26
target/arm: Set PSTATE.TCO on exception entry
Richard Henderson
1
-0
/
+3
2020-06-26
target/arm: Implement data cache set allocation tags
Richard Henderson
3
-1
/
+58
2020-06-26
target/arm: Complete TBI clearing for user-only for SVE
Richard Henderson
3
-2
/
+25
2020-06-26
target/arm: Add mte helpers for sve scatter/gather memory ops
Richard Henderson
3
-253
/
+877
2020-06-26
target/arm: Handle TBI for sve scalar + int memory ops
Richard Henderson
3
-3
/
+6
2020-06-26
target/arm: Add mte helpers for sve scalar + int ff/nf loads
Richard Henderson
3
-100
/
+357
2020-06-26
target/arm: Add mte helpers for sve scalar + int stores
Richard Henderson
3
-78
/
+226
2020-06-26
target/arm: Add mte helpers for sve scalar + int loads
Richard Henderson
5
-98
/
+385
2020-06-26
target/arm: Add arm_tlb_bti_gp
Richard Henderson
3
-2
/
+15
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