riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-05-17	s390x/tcg: Implement VECTOR AND (WITH COMPLEMENT)	David Hildenbrand	2	-0/+18
2019-05-17	s390x/tcg: Implement VECTOR ADD WITH CARRY COMPUTE CARRY	David Hildenbrand	2	-0/+34
2019-05-17	s390x/tcg: Implement VECTOR ADD WITH CARRY	David Hildenbrand	2	-0/+65
2019-05-17	s390x/tcg: Implement VECTOR ADD COMPUTE CARRY	David Hildenbrand	2	-0/+100
2019-05-17	s390x/tcg: Implement VECTOR ADD	David Hildenbrand	2	-0/+57
2019-05-17	hvf: Add missing break statement	Chen Zhang	1	-0/+1
2019-05-17	target/m68k: Optimize rotate_x() using extract_i32()	Philippe Mathieu-Daudé	1	-3/+2
2019-05-17	target/m68k: Fix a tcg_temp leak	Philippe Mathieu-Daudé	1	-0/+1
2019-05-17	target/m68k: Reduce the l1 TCGLabel scope	Philippe Mathieu-Daudé	1	-2/+1
2019-05-16	target/m68k: Switch to transaction_failed hook	Peter Maydell	3	-16/+13
2019-05-16	target/m68k: In get_physical_address() check for memory access failures	Peter Maydell	1	-10/+52
2019-05-16	target/m68k: In dump_address_map() check for memory access failures	Peter Maydell	1	-7/+15
2019-05-16	Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510' into staging	Peter Maydell	78	-1042/+758
2019-05-15	target/xtensa: implement exclusive access option	Max Filippov	6	-2/+152
2019-05-15	target/xtensa: update list of exception causes	Max Filippov	1	-4/+5
2019-05-15	target/xtensa: implement block prefetch option opcodes	Max Filippov	1	-0/+42
2019-05-14	target/xtensa: implement DIWBUI.P opcode	Max Filippov	3	-0/+12
2019-05-13	target/xtensa: Use tcg_gen_abs_i32	Richard Henderson	1	-8/+1
2019-05-13	target/tricore: Use tcg_gen_abs_tl	Philippe Mathieu-Daudé	1	-22/+5
2019-05-13	target/s390x: Use tcg_gen_abs_i64	Richard Henderson	1	-7/+1
2019-05-13	target/ppc: Use tcg_gen_abs_tl	Richard Henderson	1	-44/+24
2019-05-13	target/ppc: Use tcg_gen_abs_i32	Philippe Mathieu-Daudé	1	-13/+1
2019-05-13	target/cris: Use tcg_gen_abs_tl	Richard Henderson	1	-8/+1
2019-05-13	target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs	Richard Henderson	4	-51/+8
2019-05-13	tcg: Add support for integer absolute value	Richard Henderson	1	-10/+0
2019-05-13	tcg: Specify optional vector requirements with a list	Richard Henderson	3	-45/+94
2019-05-13	Clean up decorations and whitespace around header guards	Markus Armbruster	1	-1/+1
2019-05-13	Normalize header guard symbol definition.	Markus Armbruster	3	-3/+3
2019-05-13	Clean up ill-advised or unusual header guards	Markus Armbruster	9	-21/+24
2019-05-13	Clean up header guards that don't match their file name	Markus Armbruster	5	-14/+18
2019-05-13	target/xtensa: Clean up core-isa.h header guards	Markus Armbruster	4	-20/+12
2019-05-13	Use #include "..." for our own headers, <...> for others	Markus Armbruster	2	-2/+1
2019-05-10	target/xtensa: implement MPU option	Max Filippov	6	-1/+566
2019-05-10	target/xtensa: add parity/ECC option SRs	Max Filippov	3	-0/+170
2019-05-10	target/xtensa: define IDMA and gather/scatter IRQ types	Max Filippov	2	-0/+6
2019-05-10	target/xtensa: make internal MMU functions static	Max Filippov	2	-95/+87
2019-05-10	target/xtensa: get rid of centralized SR properties	Max Filippov	3	-1005/+1484
2019-05-10	tcg: Use tlb_fill probe from tlb_vaddr_to_host	Richard Henderson	1	-5/+1
2019-05-10	tcg: Use CPUClass::tlb_fill in cputlb.c	Richard Henderson	20	-128/+0
2019-05-10	target/xtensa: Convert to CPUClass::tlb_fill	Richard Henderson	3	-18/+31
2019-05-10	target/unicore32: Convert to CPUClass::tlb_fill	Richard Henderson	5	-47/+19
2019-05-10	target/tricore: Convert to CPUClass::tlb_fill	Richard Henderson	4	-37/+23
2019-05-10	target/tilegx: Convert to CPUClass::tlb_fill	Richard Henderson	1	-4/+6
2019-05-10	target/sparc: Convert to CPUClass::tlb_fill	Richard Henderson	4	-36/+43
2019-05-10	target/sh4: Convert to CPUClass::tlb_fill	Richard Henderson	4	-118/+101
2019-05-10	target/s390x: Convert to CPUClass::tlb_fill	Richard Henderson	4	-44/+55
2019-05-10	target/riscv: Convert to CPUClass::tlb_fill	Richard Henderson	3	-30/+26
2019-05-10	target/ppc: Convert to CPUClass::tlb_fill	Richard Henderson	4	-22/+26
2019-05-10	target/openrisc: Convert to CPUClass::tlb_fill	Richard Henderson	3	-36/+39
2019-05-10	target/nios2: Convert to CPUClass::tlb_fill	Richard Henderson	4	-107/+91