index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
stable-9.1
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
staging-9.1
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
Age
Commit message (
Expand
)
Author
Files
Lines
2021-04-13
target/mips: Fix TCG temporary leak in gen_cache_operation()
Philippe Mathieu-Daudé
1
-0
/
+2
2021-04-12
target/arm: Check PAGE_WRITE_ORG for MTE writeability
Richard Henderson
1
-1
/
+1
2021-04-09
i386: Add missing cpu feature bits in EPYC-Rome model
Babu Moger
1
-0
/
+12
2021-04-06
Revert "target/arm: Make number of counters in PMCR follow the CPU"
Peter Maydell
5
-28
/
+12
2021-04-05
target/alpha: fix icount handling for timer instructions
Pavel Dovgalyuk
1
-2
/
+7
2021-04-04
Merge remote-tracking branch 'remotes/xtensa/tags/20210403-xtensa' into staging
Peter Maydell
2
-12
/
+5
2021-04-03
target/xtensa: make xtensa_modules static on import
Max Filippov
1
-0
/
+1
2021-04-03
target/xtensa: fix meson.build rule for xtensa cores
Max Filippov
2
-12
/
+4
2021-04-01
hexagon: do not specify Python scripts as inputs
Paolo Bonzini
1
-20
/
+10
2021-04-01
hexagon: do not specify executables as inputs
Paolo Bonzini
1
-4
/
+2
2021-04-01
target/openrisc: fix icount handling for timer instructions
Pavel Dovgalyuk
1
-0
/
+15
2021-04-01
target/i386: Verify memory operand for lcall and ljmp
Richard Henderson
1
-0
/
+6
2021-03-31
target/ppc/kvm: Cache timebase frequency
Greg Kurz
1
-6
/
+19
2021-03-30
target/arm: Make number of counters in PMCR follow the CPU
Peter Maydell
5
-12
/
+28
2021-03-26
s390x: move S390_ADAPTER_SUPPRESSIBLE
Gerd Hoffmann
1
-3
/
+6
2021-03-23
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210323'...
Peter Maydell
2
-1
/
+2
2021-03-23
target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
Richard Henderson
1
-0
/
+1
2021-03-23
target/arm: Make M-profile VTOR loads on reset handle memory aliasing
Peter Maydell
1
-1
/
+1
2021-03-22
target/riscv: Prevent lost illegal instruction exceptions
Georg Kotheimer
1
-178
/
+1
2021-03-22
target/riscv: Add proper two-stage lookup exception detection
Georg Kotheimer
3
-13
/
+13
2021-03-22
target/riscv: Fix read and write accesses to vsip and vsie
Georg Kotheimer
1
-34
/
+34
2021-03-22
target/riscv: Use background registers also for MSTATUS_MPV
Georg Kotheimer
1
-1
/
+1
2021-03-22
target/riscv: Make VSTIP and VSEIP read-only in hip
Georg Kotheimer
1
-3
/
+4
2021-03-22
target/riscv: Adjust privilege level for HLV(X)/HSV instructions
Georg Kotheimer
1
-11
/
+14
2021-03-22
target/riscv: flush TLB pages if PMP permission has been changed
Jim Shu
1
-0
/
+4
2021-03-22
target/riscv: add log of PMP permission checking
Jim Shu
1
-0
/
+12
2021-03-22
target/riscv: propagate PMP permission to TLB page
Jim Shu
3
-43
/
+125
2021-03-22
target/riscv: fix vs() to return proper error code
Frank Chang
1
-1
/
+1
2021-03-22
target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX
Peter Maydell
1
-4
/
+4
2021-03-19
i386: Make migration fail when Hyper-V reenlightenment was enabled but 'user_...
Vitaly Kuznetsov
2
-0
/
+21
2021-03-19
i386: Fix 'hypercall_hypercall' typo
Vitaly Kuznetsov
1
-2
/
+2
2021-03-19
target/i386: svm: do not discard high 32 bits of EXITINFO1
Paolo Bonzini
3
-11
/
+10
2021-03-19
target/i386: fail if toggling LA57 in 64-bit mode
Paolo Bonzini
1
-0
/
+4
2021-03-19
target/i386: allow modifying TCG phys-addr-bits
Paolo Bonzini
4
-27
/
+16
2021-03-17
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210316' into...
Peter Maydell
8
-73
/
+153
2021-03-15
Merge remote-tracking branch 'remotes/philmd/tags/avr-20210315' into staging
Peter Maydell
1
-4
/
+6
2021-03-15
Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20210314...
Peter Maydell
3
-22
/
+20
2021-03-15
target/s390x: Store r1/r2 for page-translation exceptions during MVPG
David Hildenbrand
4
-21
/
+36
2021-03-15
target/s390x: Implement the MVPG condition-code-option bit
Richard Henderson
3
-23
/
+121
2021-03-15
s390x/cpu_model: use official name for 8562
Cornelia Huck
1
-2
/
+2
2021-03-15
s390x/kvm: Get rid of legacy_s390_alloc()
David Hildenbrand
1
-38
/
+5
2021-03-15
target/avr: Fix interrupt execution
Ivanov Arkasha
1
-1
/
+3
2021-03-15
target/avr: Fix some comment spelling errors
Lichang Zhao
1
-3
/
+3
2021-03-14
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210313' into staging
Peter Maydell
7
-3645
/
+2017
2021-03-14
target/tricore: Fix OPC2_32_RRPW_EXTR for width=0
Bastian Koppelmann
1
-0
/
+5
2021-03-14
target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2
Bastian Koppelmann
1
-1
/
+7
2021-03-14
tricore: fixed faulty conditions for extr and imask
Andreas Konopik
1
-4
/
+4
2021-03-14
target/tricore: Remove unused definitions
Philippe Mathieu-Daudé
1
-12
/
+0
2021-03-14
target/tricore: Pass MMUAccessType to get_physical_address()
Philippe Mathieu-Daudé
1
-4
/
+2
2021-03-14
target/tricore: Replace magic value by MMU_DATA_LOAD definition
Philippe Mathieu-Daudé
1
-1
/
+2
[next]