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2017-10-30Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell3-2/+6
2017-10-27xtensa: cleanup cpu type name compositionIgor Mammedov3-2/+6
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell1-1/+1
2017-10-25disas: Remove unused flags argumentsRichard Henderson1-1/+1
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson1-3/+0
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota1-1/+1
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota1-14/+14
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson1-6/+1
2017-10-09qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé1-4/+0
2017-09-26target/xtensa: Use the pre-defined MEMTXATTRS_UNSPECIFIED macroAlistair Francis1-2/+2
2017-09-06target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova1-0/+4
2017-09-01xtensa: replace cpu_xtensa_init() with cpu_generic_init()Igor Mammedov3-25/+4
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova1-3/+2
2017-07-14char: add backend hotswap handlerAnton Nefedov1-1/+1
2017-07-11target/xtensa: gdbstub: drop dead return statementMax Filippov1-1/+0
2017-06-06target/xtensa: handle unknown registers in gdbstubMax Filippov1-3/+10
2017-06-06target/xtensa: support output to chardev consoleMax Filippov2-14/+53
2017-06-06target/xtensa: fix return value of read/write simcallsMax Filippov1-5/+20
2017-06-06target/xtensa: fix mapping direction in read/write simcallsMax Filippov1-2/+2
2017-03-18Merge remote-tracking branch 'remotes/xtensa/tags/20170317-xtensa' into stagingPeter Maydell1-13/+36
2017-03-11target/xtensa: fix semihosting argc/argv implementationMax Filippov1-13/+36
2017-03-09target/xtensa: hold BQL for interrupt processingAlex Bennée2-0/+8
2017-02-23target/xtensa: add two missing headers to core import scriptMax Filippov1-0/+2
2017-02-23target/xtensa: sim: instantiate local memoriesMax Filippov2-0/+176
2017-02-21monitor: Fix crashes when using HMP commands without CPUThomas Huth1-0/+4
2017-01-25Merge remote-tracking branch 'remotes/xtensa/tags/20170124-xtensa' into stagingPeter Maydell7-101/+348
2017-01-16target-xtensa: implement RER/WER instructionsMax Filippov6-3/+44
2017-01-15target/xtensa: implement MEMCTL SRMax Filippov6-0/+68
2017-01-15target/xtensa: fix ICACHE/DCACHE options detectionMax Filippov1-2/+2
2017-01-15target/xtensa: don't continue translation after exceptionMax Filippov1-1/+4
2017-01-15target/xtensa: support icountMax Filippov3-45/+143
2017-01-15target/xtensa: refactor CCOUNT/CCOMPAREMax Filippov4-46/+51
2017-01-15target/xtensa: implement RUNSTALLMax Filippov3-2/+17
2017-01-15target/xtensa: add static vectors selectionMax Filippov3-3/+20
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée1-1/+1
2017-01-10target-xtensa: Use clrsb helperRichard Henderson1-10/+1
2017-01-10target-xtensa: Use clz opcodeRichard Henderson3-17/+11
2016-12-20Move target-* CPU file into a target/ folderThomas Huth21-0/+8786