aboutsummaryrefslogtreecommitdiff
path: root/target/xtensa
AgeCommit message (Expand)AuthorFilesLines
2020-11-15xtensa tcg cpus: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-11-13hmp: Pass monitor to mon_get_cpu_env()Kevin Wolf1-1/+1
2020-10-26target/xtensa: enable all coprocessors for linux-userMax Filippov1-0/+1
2020-09-23qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi2-3/+3
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost1-1/+1
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost1-4/+2
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost1-6/+2
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost1-3/+5
2020-08-21target/xtensa: import DSP3400 coreMax Filippov6-0/+173129
2020-08-21target/xtensa: import de233_fpu coreMax Filippov6-0/+22538
2020-08-21target/xtensa: implement FPU division and square rootMax Filippov3-0/+132
2020-08-21target/xtensa: add DFPU registers and opcodesMax Filippov6-34/+1413
2020-08-21target/xtensa: add DFPU optionMax Filippov2-0/+25
2020-08-21target/xtensa: don't access BR regfile directlyMax Filippov3-34/+42
2020-08-21target/xtensa: move FSR/FCR register accessorsMax Filippov1-32/+32
2020-08-21target/xtensa: rename FPU2000 translators and helpersMax Filippov3-55/+57
2020-08-21target/xtensa: support copying registers up to 64 bits wideMax Filippov2-5/+22
2020-08-21target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov3-10/+31
2020-08-21target/xtensa: implement NMI supportMax Filippov3-9/+21
2020-08-21target/xtensa: make opcode properties more dynamicMax Filippov2-265/+278
2020-08-21meson: targetPaolo Bonzini2-16/+30
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini21-17/+17
2020-06-25Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into stagingPeter Maydell3-23/+46
2020-06-22target/xtensa: drop gen_io_end callMax Filippov1-3/+0
2020-05-19softfloat: Name compare relation enumRichard Henderson1-3/+3
2020-05-17target/xtensa: fix simcall for newer hardwareMax Filippov1-3/+6
2020-05-17target/xtensa: fetch HW version from configuration overlayMax Filippov2-3/+6
2020-04-30target/xtensa: work around missing SR definitionsMax Filippov1-14/+34
2020-04-15gdbstub: Do not use memset() on GByteArrayPhilippe Mathieu-Daudé1-4/+2
2020-04-07target/xtensa: statically allocate xtensa_insnbufs in DisasContextMax Filippov3-16/+6
2020-04-07target/xtensa: fix pasto in pfwait.r opcode nameMax Filippov1-1/+1
2020-04-07target/xtensa: add FIXME for translation memory leakAlex Bennée1-0/+5
2020-03-19Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2-5/+5
2020-03-17cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell2-5/+5
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée2-2/+2
2020-01-24cpu: Use cpu_class_set_parent_reset()Greg Kurz1-2/+1
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2020-01-15target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIXRichard Henderson1-4/+0
2020-01-15target/xtensa: Use probe_access for itlb_hit_testRichard Henderson1-2/+3
2020-01-06target/xtensa: use MPU background map from core configurationMax Filippov2-2/+17
2020-01-06target/xtensa: import xtensa/config/core-isa.hMax Filippov1-2/+2
2020-01-06target/xtensa: fix ps.ring use in MPU configsMax Filippov2-4/+9
2019-10-28target/xtensa: fetch code with translator_ldEmilio G. Cota1-2/+2
2019-10-18target/xtensa: regenerate and re-import test_mmuhifi_c3 coreMax Filippov4-3001/+3154
2019-09-11target/xtensa: linux-user: add call0 ABI supportMax Filippov2-4/+23
2019-08-22Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2019-08-21' in...Peter Maydell1-1/+1
2019-08-21hw/core: Move cpu.c, cpu.h from qom/ to hw/core/Markus Armbruster1-1/+1
2019-08-20icount: remove unnecessary gen_io_end callsPavel Dovgalyuk1-15/+0
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com1-2/+0
2019-08-16Clean up inclusion of sysemu/sysemu.hMarkus Armbruster2-2/+0