riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2018-10-01	target/xtensa: extract test for an illegal instruction	Max Filippov	1	-0/+6
2018-09-17	target/xtensa: convert to do_transaction_failed	Max Filippov	1	-7/+23
2018-08-19	target/xtensa: clean up gdbstub register handling	Max Filippov	1	-11/+1
2018-08-19	target/xtensa: fix gdbstub register counts	Max Filippov	1	-1/+3
2018-07-02	hw/xtensa: Use the IEC binary prefix definitions	Philippe Mathieu-Daudé	1	-2/+3
2018-03-16	target/xtensa: add linux-user support	Max Filippov	1	-0/+31
2018-03-13	target/xtensa: use correct number of registers in gdbstub	Max Filippov	1	-8/+20
2018-01-09	target/xtensa: use libisa for instruction decoding	Max Filippov	1	-0/+37
2017-10-27	xtensa: cleanup cpu type name composition	Igor Mammedov	1	-1/+1
2017-09-01	xtensa: replace cpu_xtensa_init() with cpu_generic_init()	Igor Mammedov	1	-22/+0
2017-03-09	target/xtensa: hold BQL for interrupt processing	Alex Bennée	1	-0/+1
2017-01-15	target/xtensa: implement RUNSTALL	Max Filippov	1	-0/+13
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+730