Age | Commit message (Expand) | Author | Files | Lines |
2023-06-26 | target: Widen pc/cs_base in cpu_get_tb_cpu_state | Anton Johansson | 1 | -2/+2 |
2023-02-27 | target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu | Philippe Mathieu-Daudé | 1 | -1/+1 |
2022-05-06 | target/xtensa: add clock input to xtensa CPU | Max Filippov | 1 | -0/+5 |
2022-04-21 | compiler.h: replace QEMU_NORETURN with G_NORETURN | Marc-André Lureau | 1 | -3/+3 |
2022-04-06 | Move CPU softfloat unions to cpu-float.h | Marc-André Lureau | 1 | -0/+1 |
2022-04-06 | Replace TARGET_WORDS_BIGENDIAN | Marc-André Lureau | 1 | -1/+1 |
2022-04-06 | Replace config-time define HOST_WORDS_BIGENDIAN | Marc-André Lureau | 1 | -1/+1 |
2022-03-06 | target: Use ArchCPU as interface to target CPU | Philippe Mathieu-Daudé | 1 | -1/+1 |
2022-03-06 | target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro | Philippe Mathieu-Daudé | 1 | -2/+0 |
2022-03-06 | target: Use CPUArchState as interface to target-specific CPU state | Philippe Mathieu-Daudé | 1 | -4/+3 |
2022-03-06 | target: Use forward declared type instead of structure type | Philippe Mathieu-Daudé | 1 | -1/+1 |
2021-11-02 | target/xtensa: Make xtensa_cpu_tlb_fill sysemu only | Richard Henderson | 1 | -1/+1 |
2021-09-21 | hw/core: Make do_unaligned_access noreturn | Richard Henderson | 1 | -2/+2 |
2021-09-21 | include/exec: Move cpu_signal_handler declaration | Richard Henderson | 1 | -2/+0 |
2021-09-14 | target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu | Philippe Mathieu-Daudé | 1 | -2/+2 |
2021-09-14 | target/xtensa: Restrict do_transaction_failed() to sysemu | Philippe Mathieu-Daudé | 1 | -0/+2 |
2021-05-20 | target/xtensa: don't generate extra EXCP_DEBUG on exception | Max Filippov | 1 | -7/+0 |
2020-08-21 | target/xtensa: add DFPU registers and opcodes | Max Filippov | 1 | -0/+3 |
2020-08-21 | target/xtensa: add DFPU option | Max Filippov | 1 | -0/+2 |
2020-08-21 | target/xtensa: support copying registers up to 64 bits wide | Max Filippov | 1 | -0/+1 |
2020-08-21 | target/xtensa: add geometry to xtensa_get_regfile_by_name | Max Filippov | 1 | -1/+1 |
2020-08-21 | target/xtensa: implement NMI support | Max Filippov | 1 | -0/+1 |
2020-08-21 | target/xtensa: make opcode properties more dynamic | Max Filippov | 1 | -4/+1 |
2020-05-17 | target/xtensa: fetch HW version from configuration overlay | Max Filippov | 1 | -0/+1 |
2020-04-07 | target/xtensa: statically allocate xtensa_insnbufs in DisasContext | Max Filippov | 1 | -0/+3 |
2020-03-17 | gdbstub: extend GByteArray to read register helpers | Alex Bennée | 1 | -1/+1 |
2020-01-15 | target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX | Richard Henderson | 1 | -4/+0 |
2020-01-06 | target/xtensa: fix ps.ring use in MPU configs | Max Filippov | 1 | -3/+7 |
2019-09-11 | target/xtensa: linux-user: add call0 ABI support | Max Filippov | 1 | -0/+3 |
2019-08-20 | configure: Define target access alignment in configure | tony.nguyen@bt.com | 1 | -2/+0 |
2019-06-12 | Include qemu-common.h exactly where needed | Markus Armbruster | 1 | -1/+0 |
2019-06-10 | cpu: Remove CPU_COMMON | Richard Henderson | 1 | -2/+0 |
2019-06-10 | cpu: Introduce CPUNegativeOffsetState | Richard Henderson | 1 | -0/+1 |
2019-06-10 | cpu: Move ENV_OFFSET to exec/gen-icount.h | Richard Henderson | 1 | -2/+0 |
2019-06-10 | target/xtensa: Use env_cpu, env_archcpu | Richard Henderson | 1 | -11/+6 |
2019-06-10 | cpu: Replace ENV_GET_CPU with env_cpu | Richard Henderson | 1 | -2/+0 |
2019-06-10 | cpu: Define ArchCPU | Richard Henderson | 1 | -0/+1 |
2019-06-10 | cpu: Define CPUArchState with typedef | Richard Henderson | 1 | -2/+2 |
2019-06-10 | tcg: Split out target/arch/cpu-param.h | Richard Henderson | 1 | -16/+5 |
2019-05-21 | Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging | Peter Maydell | 1 | -23/+35 |
2019-05-15 | target/xtensa: implement exclusive access option | Max Filippov | 1 | -0/+2 |
2019-05-15 | target/xtensa: update list of exception causes | Max Filippov | 1 | -4/+5 |
2019-05-14 | target/xtensa: implement DIWBUI.P opcode | Max Filippov | 1 | -0/+1 |
2019-05-10 | target/xtensa: implement MPU option | Max Filippov | 1 | -0/+17 |
2019-05-10 | target/xtensa: add parity/ECC option SRs | Max Filippov | 1 | -0/+6 |
2019-05-10 | target/xtensa: define IDMA and gather/scatter IRQ types | Max Filippov | 1 | -0/+3 |
2019-05-10 | target/xtensa: make internal MMU functions static | Max Filippov | 1 | -19/+0 |
2019-05-10 | target/xtensa: get rid of centralized SR properties | Max Filippov | 1 | -0/+1 |
2019-05-10 | target/xtensa: Convert to CPUClass::tlb_fill | Richard Henderson | 1 | -2/+3 |
2019-04-18 | qom/cpu: Simplify how CPUClass:cpu_dump_state() prints | Markus Armbruster | 1 | -2/+1 |