| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2023-10-25 | target/sparc: Move ADDRALIGN* to decodetree | Richard Henderson | 2 | -25/+34 |
| 2023-10-25 | target/sparc: Move ARRAY* to decodetree | Richard Henderson | 2 | -21/+40 |
| 2023-10-25 | target/sparc: Move EDGE* to decodetree | Richard Henderson | 2 | -160/+133 |
| 2023-10-25 | target/sparc: Merge LDFSR, LDXFSR implementations | Richard Henderson | 3 | -46/+16 |
| 2023-10-25 | target/sparc: Move LDFSR, STFSR to decodetree | Richard Henderson | 2 | -92/+64 |
| 2023-10-25 | target/sparc: Move asi fp load/store to decodetree | Richard Henderson | 2 | -143/+81 |
| 2023-10-25 | target/sparc: Move simple fp load/store to decodetree | Richard Henderson | 2 | -100/+113 |
| 2023-10-25 | target/sparc: Split out fp ldst functions with asi precomputed | Richard Henderson | 1 | -58/+80 |
| 2023-10-25 | target/sparc: Move PREFETCH, PREFETCHA to decodetree | Richard Henderson | 2 | -17/+14 |
| 2023-10-25 | target/sparc: Move CASA, CASXA to decodetree | Richard Henderson | 2 | -43/+36 |
| 2023-10-25 | target/sparc: Move SWAP, SWAPA to decodetree | Richard Henderson | 2 | -33/+29 |
| 2023-10-25 | target/sparc: Move LDSTUB, LDSTUBA to decodetree | Richard Henderson | 2 | -24/+26 |
| 2023-10-25 | target/sparc: Move asi integer load/store to decodetree | Richard Henderson | 2 | -111/+48 |
| 2023-10-25 | target/sparc: Move simple integer load/store to decodetree | Richard Henderson | 2 | -76/+142 |
| 2023-10-25 | target/sparc: Use tcg_gen_qemu_{ld,st}_i128 for GET_ASI_DTWINX | Richard Henderson | 1 | -8/+40 |
| 2023-10-25 | target/sparc: Split out ldst functions with asi pre-computed | Richard Henderson | 1 | -85/+116 |
| 2023-10-25 | target/sparc: Drop ifdef around get_asi and friends | Richard Henderson | 1 | -117/+72 |
| 2023-10-25 | target/sparc: Split out resolve_asi | Richard Henderson | 1 | -4/+21 |
| 2023-10-25 | target/sparc: Move DONE, RETRY to decodetree | Richard Henderson | 2 | -62/+29 |
| 2023-10-25 | target/sparc: Move FLUSH, SAVE, RESTORE to decodetree | Richard Henderson | 2 | -10/+29 |
| 2023-10-25 | target/sparc: Move JMPL, RETT, RETURN to decodetree | Richard Henderson | 2 | -45/+88 |
| 2023-10-25 | target/sparc: Convert remaining v8 coproc insns to decodetree | Richard Henderson | 2 | -26/+17 |
| 2023-10-25 | target/sparc: Move POPC to decodetree | Richard Henderson | 2 | -47/+12 |
| 2023-10-25 | target/sparc: Move MOVcc, MOVR to decodetree | Richard Henderson | 2 | -56/+64 |
| 2023-10-25 | target/sparc: Move SLL, SRL, SRA to decodetree | Richard Henderson | 2 | -104/+92 |
| 2023-10-25 | target/sparc: Move TADD, TSUB, MULS to decodetree | Richard Henderson | 3 | -30/+29 |
| 2023-10-25 | target/sparc: Move UDIV, SDIV to decodetree | Richard Henderson | 3 | -33/+27 |
| 2023-10-25 | target/sparc: Move UDIVX, SDIVX to decodetree | Richard Henderson | 2 | -9/+18 |
| 2023-10-25 | target/sparc: Move SUBC to decodetree | Richard Henderson | 2 | -50/+90 |
| 2023-10-25 | target/sparc: Move UMUL, SMUL to decodetree | Richard Henderson | 2 | -18/+6 |
| 2023-10-25 | target/sparc: Move MULX to decodetree | Richard Henderson | 2 | -5/+6 |
| 2023-10-25 | target/sparc: Move ADDC to decodetree | Richard Henderson | 2 | -55/+94 |
| 2023-10-25 | target/sparc: Move basic arithmetic to decodetree | Richard Henderson | 2 | -103/+94 |
| 2023-10-25 | target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver | Richard Henderson | 1 | -19/+13 |
| 2023-10-25 | target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr | Richard Henderson | 1 | -27/+14 |
| 2023-10-25 | target/sparc: Remove cpu_wim | Richard Henderson | 1 | -6/+8 |
| 2023-10-25 | target/sparc: Move WRTBR, WRHPR to decodetree | Richard Henderson | 2 | -54/+66 |
| 2023-10-25 | target/sparc: Move WRWIM, WRPR to decodetree | Richard Henderson | 2 | -136/+200 |
| 2023-10-25 | target/sparc: Move WRPSR, SAVED, RESTORED to decodetree | Richard Henderson | 2 | -33/+39 |
| 2023-10-25 | target/sparc: Move WRASR to decodetree | Richard Henderson | 2 | -156/+216 |
| 2023-10-25 | target/sparc: Move RDTBR, FLUSHW to decodetree | Richard Henderson | 2 | -12/+16 |
| 2023-10-25 | target/sparc: Move RDWIM, RDPR to decodetree | Richard Henderson | 2 | -138/+204 |
| 2023-10-25 | target/sparc: Move RDPSR, RDHPR to decodetree | Richard Henderson | 2 | -43/+83 |
| 2023-10-25 | target/sparc: Move RDASR, STBAR, MEMBAR to decodetree | Richard Henderson | 2 | -129/+235 |
| 2023-10-25 | target/sparc: Move Tcc to decodetree | Richard Henderson | 2 | -79/+89 |
| 2023-10-25 | target/sparc: Move SETHI to decodetree | Richard Henderson | 2 | -35/+21 |
| 2023-10-25 | target/sparc: Pass DisasCompare to advance_jump_cond | Richard Henderson | 1 | -18/+13 |
| 2023-10-25 | target/sparc: Merge gen_branch_[an] with only caller | Richard Henderson | 1 | -43/+30 |
| 2023-10-25 | target/sparc: Merge gen_fcond with only caller | Richard Henderson | 1 | -14/+8 |
| 2023-10-25 | target/sparc: Merge gen_cond with only caller | Richard Henderson | 1 | -15/+8 |
