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AgeCommit message (Expand)AuthorFilesLines
2023-10-11target/sh4: Disable decode_gusa when plugins enabledRichard Henderson1-12/+29
2023-10-07meson: Rename target_softmmu_arch -> target_system_archPhilippe Mathieu-Daudé1-1/+1
2023-10-04accel/tcg: Remove cpu_set_cpustate_pointersRichard Henderson1-2/+0
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson2-3/+3
2023-10-03tcg: Rename cpu_env to tcg_envRichard Henderson1-62/+62
2023-10-03accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson1-1/+0
2023-10-03target/*: Add instance_align to all cpu base classesRichard Henderson1-0/+1
2023-08-31target/translate: Remove unnecessary 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé1-1/+0
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson1-2/+2
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé1-3/+3
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson1-2/+0
2023-06-05target/sh4: Emit insn_start for each insn in gUSA regionRichard Henderson1-3/+12
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson1-0/+4
2023-05-23tcg: Remove DEBUG_DISASRichard Henderson1-2/+0
2023-05-11target/sh4: Use MO_ALIGN where requiredRichard Henderson1-36/+66
2023-03-16target/sh4: Honor QEMU_LOG_FILENAME with QEMU_LOG=cpuIlya Leoshkevich1-7/+7
2023-03-13target/sh4: Avoid tcg_const_i32Richard Henderson1-13/+13
2023-03-13target/sh4: Avoid tcg_const_i32 for TAS.BRichard Henderson1-6/+3
2023-03-13target/sh4: Remove `NB_MMU_MODES` defineAnton Johansson1-1/+0
2023-03-07gdbstub: move register helpers into standalone includeAlex Bennée1-1/+1
2023-03-05target/sh4: Drop tcg_temp_freeRichard Henderson1-110/+0
2023-03-01accel/tcg: Pass max_insn to gen_intermediate_code by pointerRichard Henderson1-1/+1
2023-03-01target/sh4: Replace `tb_pc()` with `tb->pc`Anton Johansson1-2/+4
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé1-1/+1
2022-12-18target/sh4: Mask restore of env->flags from tb->flagsGuenter Roeck1-1/+1
2022-12-16target/sh4: Convert to 3-phase resetPeter Maydell2-6/+10
2022-10-26target/sh4: Convert to tcg_ops restore_state_to_opcRichard Henderson2-10/+16
2022-10-04target/sh4: Fix TB_FLAG_UNALIGNRichard Henderson4-74/+86
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson1-2/+2
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson1-0/+8
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson1-2/+3
2022-05-11Normalize header guard symbol definitionMarkus Armbruster1-1/+1
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2-5/+6
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson1-3/+4
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau1-0/+1
2022-03-31target/sh4: Remove old README.sh4 fileThomas Huth1-150/+0
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé1-1/+1
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé2-4/+1
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé1-2/+1
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot1-6/+6
2022-01-06target/sh4: Implement prctl_unalign_sigbusRichard Henderson2-16/+38
2021-11-02target/sh4: Set fault address in superh_cpu_do_unaligned_accessRichard Henderson1-0/+5
2021-11-02target/sh4: Make sh4_cpu_tlb_fill sysemu onlyRichard Henderson3-12/+5
2021-10-15target/sh4: Drop check for singlestep_enabledRichard Henderson3-17/+3
2021-10-04target/sh4: Use lookup_symbol in sh4_tr_disas_logRichard Henderson1-1/+1
2021-09-21hw/core: Make do_unaligned_access noreturnRichard Henderson1-2/+2
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson1-3/+0
2021-09-14target/sh4: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé3-10/+5
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich1-2/+2
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson1-18/+0