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AgeCommit message (Expand)AuthorFilesLines
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster3-3/+0
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2-0/+2
2019-06-11qemu-common: Move tcg_enabled() etc. to sysemu/tcg.hMarkus Armbruster8-3/+9
2019-06-10cpu: Remove CPU_COMMONRichard Henderson1-2/+0
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson1-0/+1
2019-06-10cpu: Introduce cpu_set_cpustate_pointersRichard Henderson1-4/+5
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson1-1/+0
2019-06-10target/s390x: Use env_cpu, env_archcpuRichard Henderson12-74/+56
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson3-15/+13
2019-06-10cpu: Define ArchCPURichard Henderson1-0/+1
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson1-4/+4
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson2-10/+18
2019-06-07s390x/tcg: Use tcg_gen_gvec_bitsel for VECTOR SELECTRichard Henderson1-32/+6
2019-06-07s390x: Bump the "qemu" CPU model up to a stripped-down z13David Hildenbrand2-6/+9
2019-06-07s390x/tcg: We support the Vector FacilityDavid Hildenbrand1-0/+1
2019-06-07s390x/tcg: Allow linux-user to use vector instructionsDavid Hildenbrand1-0/+3
2019-06-07s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand4-0/+62
2019-06-07s390x/tcg: Implement VECTOR FP SUBTRACTDavid Hildenbrand4-0/+24
2019-06-07s390x/tcg: Implement VECTOR FP SQUARE ROOTDavid Hildenbrand4-0/+40
2019-06-07s390x/tcg: Implement VECTOR FP PERFORM SIGN OPERATIONDavid Hildenbrand2-0/+54
2019-06-07s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand4-0/+79
2019-06-07s390x/tcg: Implement VECTOR FP MULTIPLYDavid Hildenbrand4-0/+24
2019-06-07s390x/tcg: Implement VECTOR LOAD ROUNDEDDavid Hildenbrand4-0/+50
2019-06-07s390x/tcg: Implement VECTOR LOAD LENGTHENEDDavid Hildenbrand4-0/+58
2019-06-07s390x/tcg: Implement VECTOR LOAD FP INTEGERDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP DIVIDEDavid Hildenbrand4-0/+24
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BITDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BITDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BITDavid Hildenbrand4-0/+30
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BITDavid Hildenbrand4-0/+76
2019-06-07s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)David Hildenbrand4-0/+173
2019-06-07s390x/tcg: Implement VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand4-0/+59
2019-06-07s390x/tcg: Implement VECTOR FP ADDDavid Hildenbrand5-0/+158
2019-06-07s390x/tcg: Export float_comp_to_cc() and float(32|64|128)_dcmask()David Hildenbrand2-2/+6
2019-06-07s390x/tcg: Introduce tcg_s390_vector_exception()David Hildenbrand3-0/+18
2019-06-07s390x/tcg: Store only the necessary amount of doublewords for STFLEDavid Hildenbrand1-1/+7
2019-06-07s390x/tcg: Fix max_byte detection for stfleDavid Hildenbrand1-1/+2
2019-06-07s390x: Use uint64_t for vector registersDavid Hildenbrand8-95/+95
2019-06-07s390x: Align vector registers to 16 bytesDavid Hildenbrand1-1/+1
2019-06-07s390x/tcg: Implement VECTOR STRING RANGE COMPAREDavid Hildenbrand5-0/+237
2019-06-07s390x/tcg: Implement VECTOR ISOLATE STRINGDavid Hildenbrand4-0/+87
2019-06-07s390x/tcg: Implement VECTOR FIND ELEMENT NOT EQUALDavid Hildenbrand5-0/+132
2019-06-07s390x/tcg: Implement VECTOR FIND ELEMENT EQUALDavid Hildenbrand4-0/+96
2019-06-07s390x/tcg: Implement VECTOR FIND ANY ELEMENT EQUALDavid Hildenbrand5-1/+198
2019-05-21Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190521-3' into stagingPeter Maydell15-5/+2499
2019-05-21s390x/cpumodel: wire up 8561 and 8562 as gen15 machinesChristian Borntraeger1-4/+5
2019-05-21s390x/cpumodel: add gen15 defintionsChristian Borntraeger1-0/+37
2019-05-21s390x/cpumodel: add Deflate-conversion facilityChristian Borntraeger5-0/+35
2019-05-21s390x/cpumodel: enhanced sort facilityChristian Borntraeger5-0/+39
2019-05-21s390x/cpumodel: vector enhancementsChristian Borntraeger2-0/+4
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