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path: root/target/s390x/translate.c
AgeCommit message (Expand)AuthorFilesLines
2020-10-02s390x/tcg: Implement CIPHER MESSAGE WITH AUTHENTICATION (KMA)David Hildenbrand1-0/+7
2020-10-02s390x/tcg: Implement MULTIPLY SINGLE (MSC, MSGC, MSGRKC, MSRKC)David Hildenbrand1-0/+19
2020-10-02s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC)David Hildenbrand1-0/+8
2020-10-02s390x/tcg: Implement MULTIPLY (MG, MGRK)David Hildenbrand1-0/+13
2020-10-02s390x/tcg: Implement ADD HALFWORD (AGH)David Hildenbrand1-0/+1
2020-10-02s390x/tcg: Implement MONITOR CALLDavid Hildenbrand1-0/+21
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-1/+1
2020-02-26target/s390x/translate: Fix RNSBG instructionThomas Huth1-1/+1
2020-01-27target/s390x: Remove DisasFields argument from extract_insnRichard Henderson1-11/+8
2020-01-27target/s390x: Move DisasFields into DisasContextRichard Henderson1-12/+10
2020-01-27target/s390x: Pass DisasContext to get_field and have_fieldRichard Henderson1-269/+265
2020-01-27target/s390x: Remove DisasFields argument from callbacksRichard Henderson1-207/+210
2020-01-27target/s390x: Move struct DisasFields definition earlierRichard Henderson1-81/+83
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-2/+2
2019-12-18target/s390x: Implement LOAD/STORE TO REAL ADDRESS inlineRichard Henderson1-17/+4
2019-12-18target/s390x: Split out helper_per_store_realRichard Henderson1-0/+8
2019-10-09target/s390x: Add ilen to unwind dataRichard Henderson1-3/+17
2019-09-23s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLYDavid Hildenbrand1-0/+4
2019-09-23s390x/tcg: MVST: Fix storing back the addresses to registersDavid Hildenbrand1-2/+6
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-3/+3
2019-06-07s390x: Use uint64_t for vector registersDavid Hildenbrand1-1/+1
2019-05-17s390x/tcg: Implement VECTOR NANDDavid Hildenbrand1-0/+1
2019-05-17s390x/tcg: Implement VECTOR COMPARE *David Hildenbrand1-0/+1
2019-05-13target/s390x: Use tcg_gen_abs_i64Richard Henderson1-7/+1
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson1-2/+2
2019-03-11s390x/tcg: Implement VECTOR LOAD WITH LENGTHDavid Hildenbrand1-0/+7
2019-03-11s390x/tcg: Implement VECTOR GENERATE BYTE MASKDavid Hildenbrand1-0/+1
2019-03-11s390x/tcg: Implement VECTOR GATHER ELEMENTDavid Hildenbrand1-0/+2
2019-03-11s390x/tcg: Check vector register instructions at central pointDavid Hildenbrand1-0/+12
2019-03-11s390x/tcg: Define vector instruction formatsDavid Hildenbrand1-1/+38
2019-03-04s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDEDDavid Hildenbrand1-3/+21
2019-03-04s390x/tcg: Implement XxC and checks for most FP instructionsDavid Hildenbrand1-63/+172
2019-03-04s390x/tcg: Check for exceptions in SET BFP ROUNDING MODEDavid Hildenbrand1-32/+24
2019-03-04s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARYDavid Hildenbrand1-0/+19
2019-03-04s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFPDavid Hildenbrand1-0/+6
2019-03-04s390x/tcg: Factor out gen_addi_and_wrap_i64() from get_address()David Hildenbrand1-15/+26
2019-03-04s390x/tcg: Factor out vec_full_reg_offset()David Hildenbrand1-2/+7
2019-03-04s390x/tcg: Clarify terminology in vec_reg_offset()David Hildenbrand1-5/+6
2019-03-04s390x/tcg: Simplify disassembler operands initializationDavid Hildenbrand1-7/+1
2019-02-18target/s390x: Implement STCK et al for CONFIG_USER_ONLYRichard Henderson1-0/+2
2019-02-04s390x/tcg: Don't model FP registers as globalsDavid Hildenbrand1-50/+85
2019-01-30target/s390x: Fix LGPL version in the file header commentsThomas Huth1-1/+1
2018-10-18target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128 at translateRichard Henderson1-7/+18
2018-10-18target/s390x: Skip wout, cout helpers if op helper does not returnRichard Henderson1-5/+15
2018-10-04s390x/tcg: refactor specification checkingDavid Hildenbrand1-28/+6
2018-10-04s390x/tcg: fix FP register pair checksDavid Hildenbrand1-10/+10
2018-10-04s390x/tcg: handle privileged instructions via flagsDavid Hildenbrand1-76/+7
2018-10-04s390x/tcg: check for AFP-register, BFP and DFP data exceptionsDavid Hildenbrand1-0/+33
2018-10-04s390x/tcg: add instruction flags for floating point instructionsDavid Hildenbrand1-0/+8
2018-10-04s390x/tcg: support flags for instructionsDavid Hildenbrand1-6/+16
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