riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-26	target/rx: Convert to tcg_ops restore_state_to_opc	Richard Henderson	1	-6/+0
2022-09-06	accel/tcg: Add pc and host_pc params to gen_intermediate_code	Richard Henderson	1	-2/+3
2022-04-21	target/rx: update PC correctly in wait instruction	Tomoaki Kawada	1	-1/+1
2022-04-21	target/rx: Swap stack pointers on clrpsw/setpsw instruction	Richard Henderson	1	-1/+6
2022-04-21	target/rx: Move DISAS_UPDATE check for write to PSW	Richard Henderson	1	-10/+4
2022-04-21	target/rx: Store PSW.U in tb->flags	Richard Henderson	1	-19/+23
2022-04-21	target/rx: Put tb_flags into DisasContext	Richard Henderson	1	-1/+3
2022-04-20	exec/translator: Pass the locked filepointer to disas_log hook	Richard Henderson	1	-3/+4
2021-10-15	target/rx: Drop checks for singlestep_enabled	Richard Henderson	1	-10/+2
2021-07-21	accel/tcg: Remove TranslatorOps.breakpoint_check	Richard Henderson	1	-14/+0
2021-07-09	target/rx: Use translator_use_goto_tb	Richard Henderson	1	-10/+1
2021-07-09	tcg: Avoid including 'trace-tcg.h' in target translate.c	Philippe Mathieu-Daudé	1	-1/+0
2020-10-27	target/rx: Fix some comment spelling errors	Lichang Zhao	1	-1/+1
2020-09-02	rx: Rename QOM type check macros	Eduardo Habkost	1	-1/+1
2020-08-21	meson: target	Paolo Bonzini	1	-1/+1
2020-08-21	meson: rename included C source files to .c.inc	Paolo Bonzini	1	-1/+1
2020-04-07	target/rx/translate: Add missing fall through comment	Philippe Mathieu-Daudé	1	-0/+1
2020-03-19	target/rx: CPU definitions	Yoshinori Sato	1	-5/+12
2020-03-19	target/rx: TCG translation	Yoshinori Sato	1	-0/+2432