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AgeCommit message (Expand)AuthorFilesLines
2024-01-29include/qemu: Add TCGCPUOps typedef to typedefs.hRichard Henderson1-1/+1
2024-01-19target/riscv: Rename tcg_cpu_FOO() to include 'riscv'Philippe Mathieu-Daudé1-14/+14
2024-01-10target/riscv: add 'parent' in profile descriptionDaniel Henrique Barboza1-1/+13
2024-01-10target/riscv: add satp_mode profile supportDaniel Henrique Barboza1-0/+40
2024-01-10target/riscv: add priv ver restriction to profilesDaniel Henrique Barboza1-0/+31
2024-01-10target/riscv: implement svadeDaniel Henrique Barboza1-0/+5
2024-01-10target/riscv: add 'rva22u64' CPUDaniel Henrique Barboza1-0/+9
2024-01-10target/riscv/tcg: validate profiles during finalizeDaniel Henrique Barboza1-0/+69
2024-01-10target/riscv/tcg: honor user choice for G MISA bitsDaniel Henrique Barboza1-25/+48
2024-01-10target/riscv/tcg: add hash table insert helpersDaniel Henrique Barboza1-12/+16
2024-01-10target/riscv/tcg: handle profile MISA bitsDaniel Henrique Barboza1-0/+21
2024-01-10target/riscv/tcg: add riscv_cpu_write_misa_bit()Daniel Henrique Barboza1-14/+18
2024-01-10target/riscv/tcg: add MISA user options hashDaniel Henrique Barboza1-1/+14
2024-01-10target/riscv/tcg: add user flag for profile supportDaniel Henrique Barboza1-0/+80
2024-01-10target/riscv/tcg: add 'zic64b' supportDaniel Henrique Barboza1-0/+26
2024-01-10target/riscv/tcg: update priv_ver on user_set extensionsDaniel Henrique Barboza1-0/+32
2024-01-10target/riscv/tcg: do not use "!generic" CPU checksDaniel Henrique Barboza1-4/+9
2024-01-10target/riscv: Add support for Zacas extensionWeiwei Li1-0/+5
2023-11-22target/riscv: don't verify ISA compatibility for zicntr and zihpmClément Chigot1-0/+9
2023-11-07target/riscv: Add "pmu-mask" property to replace "pmu-num"Rob Bradford1-2/+2
2023-11-07target/riscv: Propagate error from PMU setupRob Bradford1-1/+7
2023-11-07target/riscv: Add cfg properties for Zvks[c|g] extensionsMax Chou1-0/+17
2023-11-07target/riscv: Add cfg properties for Zvkn[c|g] extensionsMax Chou1-0/+20
2023-11-07target/riscv: Add cfg property for Zvkb extensionMax Chou1-3/+3
2023-11-07target/riscv: Add cfg property for Zvkt extensionMax Chou1-0/+5
2023-11-07target/riscv: add zihpm extension flag for TCGDaniel Henrique Barboza1-0/+13
2023-11-07target/riscv: add zicntr extension flag for TCGDaniel Henrique Barboza1-0/+8
2023-11-07Add epmp to extensions list and rename it to smepmpHimanshu Chauhan1-2/+2
2023-11-07target/riscv: add riscv_cpu_accelerator_compatible()Daniel Henrique Barboza2-1/+7
2023-11-07target/riscv/tcg: add tcg_cpu_finalize_features()Daniel Henrique Barboza2-28/+36
2023-11-07target/riscv: Set VS* bits to one in mideleg when H-Ext is enabledRajnesh Kanwal1-1/+6
2023-11-07target/riscv: rename ext_icsr to ext_zicsrDaniel Henrique Barboza1-7/+7
2023-11-07target/riscv: rename ext_ifencei to ext_zifenceiDaniel Henrique Barboza1-4/+4
2023-10-12target/riscv: deprecate capital 'Z' CPU propertiesDaniel Henrique Barboza1-1/+30
2023-10-12target/riscv/tcg: remove RVG warningDaniel Henrique Barboza1-1/+0
2023-10-12target/riscv/tcg-cpu.c: add extension properties for all cpusDaniel Henrique Barboza1-14/+50
2023-10-12target/riscv: add riscv_cpu_get_name()Daniel Henrique Barboza1-1/+3
2023-10-12target/riscv/cpu: move priv spec functions to tcg-cpu.cDaniel Henrique Barboza1-0/+38
2023-10-12target/riscv/tcg: move riscv_cpu_add_misa_properties() to tcg-cpu.cDaniel Henrique Barboza1-0/+90
2023-10-12target/riscv/tcg: introduce tcg_cpu_instance_init()Daniel Henrique Barboza1-0/+149
2023-10-12target/riscv: move riscv_tcg_ops to tcg-cpu.cDaniel Henrique Barboza1-1/+59
2023-10-12target/riscv: move riscv_cpu_validate_set_extensions() to tcg-cpu.cDaniel Henrique Barboza2-0/+384
2023-10-12target/riscv: move riscv_cpu_realize_tcg() to TCG::cpu_realizefn()Daniel Henrique Barboza1-0/+133
2023-10-12target/riscv: introduce TCG AccelCPUClassDaniel Henrique Barboza2-0/+60
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