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pmp.h
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Author
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Lines
2023-06-13
target/riscv: Change the return type of pmp_hart_has_privs() to bool
Weiwei Li
1
-4
/
+4
2023-06-13
target/riscv: Update pmp_get_tlb_size()
Weiwei Li
1
-2
/
+1
2023-05-05
target/riscv: Fix format for indentation
Weiwei Li
1
-4
/
+5
2023-01-06
target/riscv: Fix PMP propagation for tlb
LIU Zhiwei
1
-3
/
+3
2022-04-29
target/riscv: rvk: add CSR support for Zkr
Weiwei Li
1
-3
/
+5
2022-03-06
target: Include missing 'cpu.h'
Philippe Mathieu-Daudé
1
-0
/
+2
2021-05-11
target/riscv: Add ePMP CSR access functions
Hou Weiying
1
-0
/
+14
2021-03-22
target/riscv: propagate PMP permission to TLB page
Jim Shu
1
-1
/
+3
2021-01-16
target/riscv/pmp: Raise exception if no PMP entry is configured
Atish Patra
1
-0
/
+1
2020-11-03
target/riscv: Add PMP state description
Yifei Jiang
1
-0
/
+2
2020-08-21
target/riscv: Change the TLB page size depends on PMP entries.
Zong Li
1
-0
/
+2
2019-06-23
RISC-V: Check for the effective memory privilege mode during PMP checks
Hesham Almatary
1
-1
/
+1
2019-05-13
Clean up ill-advised or unusual header guards
Markus Armbruster
1
-2
/
+2
2018-03-07
RISC-V Physical Memory Protection
Michael Clark
1
-0
/
+64