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path: root/target/riscv/meson.build
AgeCommit message (Expand)AuthorFilesLines
2023-10-12target/riscv: move KVM only files to kvm subdirDaniel Henrique Barboza1-1/+1
2023-10-12target/riscv: remove kvm-stub.cDaniel Henrique Barboza1-1/+1
2023-10-12target/riscv: introduce TCG AccelCPUClassDaniel Henrique Barboza1-0/+2
2023-10-07meson: Rename target_softmmu_arch -> target_system_archPhilippe Mathieu-Daudé1-1/+1
2023-09-11target/riscv: Add Zvbc ISA extension supportLawrence Hunter1-1/+2
2023-09-11target/riscv: Refactor some of the generic vector functionalityKiran Ostrolenk1-0/+1
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé1-3/+3
2023-05-05target/riscv: add query-cpy-definitions supportDaniel Henrique Barboza1-1/+2
2023-05-05target/riscv: add support for Zcmt extensionWeiwei Li1-1/+2
2023-02-07RISC-V: Adding XTheadCmo ISA extensionChristoph Müllner1-0/+1
2022-09-07target/riscv: Add stimecmp supportAtish Patra1-1/+2
2022-09-01meson: remove dead codePaolo Bonzini1-2/+0
2022-07-03target/riscv: Support mcycle/minstret write operationAtish Patra1-1/+2
2022-04-29target/riscv: rvk: add support for zknd/zkne extension in RV32Weiwei Li1-1/+2
2022-04-22target/riscv: Add initial support for the Sdtrig extensionBin Meng1-0/+1
2022-02-16target/riscv: Add XVentanaCondOps custom extensionPhilipp Tomsich1-0/+1
2022-01-21target/riscv: Support start kernel directly by KVMYifei Jiang1-1/+1
2022-01-21target/riscv: Add target/riscv/kvm.c to place the public kvm interfaceYifei Jiang1-0/+1
2022-01-08target/riscv: support for 128-bit M extensionFrédéric Pétrot1-0/+1
2021-06-08target/riscv: rvb: generalized reverseFrank Chang1-0/+1
2021-05-11target/riscv: Consolidate RV32/64 16-bit instructionsAlistair Francis1-8/+3
2021-05-11target/riscv: Consolidate RV32/64 32-bit instructionsAlistair Francis1-1/+1
2021-03-04target-riscv: support QMP dump-guest-memoryYifei Jiang1-0/+1
2020-11-03target/riscv: Add basic vmstate description of CPUYifei Jiang1-1/+2
2020-08-21meson: targetPaolo Bonzini1-0/+34
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