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path: root/target/riscv/internals.h
AgeCommit message (Expand)AuthorFilesLines
2023-11-07target/riscv: Use env_archcpu() in [check_]nanbox()Philippe Mathieu-Daudé1-4/+4
2023-05-05target/riscv: Introduce mmuidx_2stageRichard Henderson1-0/+5
2023-05-05target/riscv: Introduce mmuidx_privRichard Henderson1-0/+9
2023-05-05target/riscv: Introduce mmuidx_sumRichard Henderson1-0/+5
2023-05-05target/riscv: Rename MMU_HYP_ACCESS_BIT to MMU_2STAGE_BITRichard Henderson1-2/+4
2023-05-05target/riscv: Reduce overhead of MSTATUS_SUM changeFei Wu1-0/+14
2022-09-07target/riscv: rvv: Add mask agnostic for vv instructionsYueh-Ting (eop) Chen1-2/+3
2022-06-10target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructionseopXD1-2/+3
2022-06-10target/riscv: rvv: Add tail agnostic for vv instructionseopXD1-2/+3
2022-03-03target/riscv: add support for zhinx/zhinxminWeiwei Li1-3/+13
2022-03-03target/riscv: add support for zfinxWeiwei Li1-3/+13
2021-12-20target/riscv: add "set round to odd" rounding mode helper functionFrank Chang1-0/+1
2021-12-20target/riscv: introduce floating-point rounding mode enumFrank Chang1-0/+9
2021-12-20target/riscv: rvv-1.0: floating-point scalar move instructionsFrank Chang1-5/+0
2021-12-20target/riscv: rvv-1.0: remove MLEN calculationsFrank Chang1-5/+4
2021-12-20target/riscv: zfh: half-precision computationalKito Cheng1-0/+16
2020-11-03target/riscv: Add basic vmstate description of CPUYifei Jiang1-0/+4
2020-08-21target/riscv: Check nanboxed inputs to fp helpersRichard Henderson1-0/+11
2020-08-21target/riscv: Generate nanboxed results from fp helpersRichard Henderson1-0/+5
2020-07-02target/riscv: integer scalar move instructionLIU Zhiwei1-0/+6
2020-07-02target/riscv: vector floating-point classify instructionsLIU Zhiwei1-0/+5
2020-07-02target/riscv: add vector amo operationsLIU Zhiwei1-0/+1
2020-07-02target/riscv: add vector stride load and store instructionsLIU Zhiwei1-0/+5
2020-07-02target/riscv: add an internals.h headerLIU Zhiwei1-0/+24
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