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2022-07-18target/ppc: Check page dir/table base alignmentLeandro Lupori1-4/+24
2022-07-18target/ppc: Improve Radix xlate level validationLeandro Lupori1-11/+38
2022-07-18ppc: Check partition and process table alignmentLeandro Lupori2-4/+18
2022-07-18target/ppc: check tb_env != 0 before printing TBU/TBL/DECRMatheus Ferst2-10/+17
2022-07-18target/ppc: Implement slbiagLucas Coutinho4-0/+46
2022-07-18target/ppc: Move slbsync to decodetreeLucas Coutinho3-17/+16
2022-07-18target/ppc: Move slbfee to decodetreeLucas Coutinho5-28/+38
2022-07-18target/ppc: Move slbmfee to decodetreeLucas Coutinho5-15/+17
2022-07-18target/ppc: Move slbmfev to decodetreeLucas Coutinho5-14/+18
2022-07-18target/ppc: Move slbmte to decodetreeLucas Coutinho5-16/+18
2022-07-18target/ppc: Move slbia to decodetreeLucas Coutinho5-19/+21
2022-07-18target/ppc: Move slbieg to decodetreeLucas Coutinho5-15/+17
2022-07-18target/ppc: Move slbie to decodetreeLucas Coutinho5-15/+23
2022-07-18target/ppc: add macros to check privilege levelMatheus Ferst2-5/+23
2022-07-18target/ppc: receive DisasContext explicitly in GEN_PRIVMatheus Ferst2-149/+154
2022-07-18target/ppc: Implement ISA 3.00 tlbie[l]Leandro Lupori4-0/+188
2022-07-18target/ppc: Move tlbie[l] to decode treeLeandro Lupori4-64/+99
2022-07-18target/ppc: fix exception error code in spr_write_excp_vectorMatheus Ferst1-3/+3
2022-07-18target/ppc: fix PMU Group A register read/write exceptionsMatheus Ferst1-5/+5
2022-07-18target/ppc: fix exception error code in helper_{load, store}_dcrMatheus Ferst2-4/+4
2022-07-18target/ppc: remove mfdcrux and mtdcruxMatheus Ferst2-22/+2
2022-07-18target/ppc: fix exception error value in slbfeeMatheus Ferst1-2/+2
2022-07-18target/ppc: Fix gen_priv_exception error value in mfspr/mtsprMatheus Ferst1-4/+4
2022-07-18target/ppc/kvm: Skip current and parent directories in kvmppc_find_cpu_dtMurilo Opsfelder Araujo1-0/+6
2022-07-18ppc: Remove unused irq_inputsCédric Le Goater2-6/+0
2022-07-06target/ppc: Fix MPC8555 and MPC8560 core type to e500v1Pali Rohár2-14/+14
2022-07-06target/ppc/cpu-models: Remove the "default" CPU aliasThomas Huth1-1/+1
2022-07-06target/ppc: Return default CPU for max CPUMurilo Opsfelder Araujo2-1/+19
2022-07-06target/ppc: implement cdtbcdMatheus Ferst4-0/+35
2022-07-06target/ppc: implement cbcdtdMatheus Ferst4-0/+51
2022-07-06target/ppc: implement addg6sMatheus Ferst2-0/+41
2022-07-06target/ppc: Add flag for ISA v2.06 BCDA instructionsMatheus Ferst2-5/+10
2022-07-06target/ppc: Implement mffscdrn[i] instructionsVíctor Colombo2-0/+46
2022-07-06target/ppc: Move mffs[.] to decodetreeVíctor Colombo3-19/+21
2022-07-06target/ppc: Move mffsl to decodetreeVíctor Colombo3-24/+17
2022-07-06target/ppc: Move mffsce to decodetreeVíctor Colombo3-32/+20
2022-07-06target/ppc: Move mffscrn[i] to decodetreeVíctor Colombo4-48/+50
2022-07-06target/ppc: Fix insn32.decode style issuesVíctor Colombo1-12/+12
2022-07-06ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy1-0/+12
2022-07-06target/ppc: use int128.h methods in vsubcuqMatheus Ferst5-52/+9
2022-07-06target/ppc: use int128.h methods in vsubecuq and vsubeuqmMatheus Ferst5-36/+17
2022-07-06target/ppc: use int128.h methods in vsubuqmMatheus Ferst5-22/+8
2022-07-06target/ppc: use int128.h methods in vaddcuqMatheus Ferst5-13/+5
2022-07-06target/ppc: use int128.h methods in vaddecuq and vaddeuqmMatheus Ferst5-51/+17
2022-07-06target/ppc: use int128.h methods in vadduqmMatheus Ferst5-9/+7
2022-07-06target/ppc: use int128.h methods in vpmsumdMatheus Ferst5-41/+17
2022-07-06target/ppc: Change FPSCR_* to follow POWER ISA numbering conventionVíctor Colombo1-36/+36
2022-06-20target/ppc: cpu_init: Clean up stop state on cpu resetFrederic Barrat1-0/+3
2022-06-20target/ppc: fix unreachable code in fpu_helper.cDaniel Henrique Barboza1-1/+1
2022-06-20target/ppc: avoid int32 multiply overflow in int_helper.cDaniel Henrique Barboza1-2/+3