| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-05-24 | target/ppc: add SMT support to msgsnd broadcast | Nicholas Piggin | 1 | -1/+1 |
| 2024-05-24 | target/ppc: Implement attn instruction on BookS 64-bit processors | Nicholas Piggin | 1 | -0/+10 |
| 2024-05-24 | target/ppc: Add clrbhrb and mfbhrbe instructions | Glenn Miles | 1 | -0/+43 |
| 2024-05-24 | target/ppc: Add recording of taken branches to BHRB | Glenn Miles | 1 | -1/+1 |
| 2024-05-24 | target/ppc: Move VMX integer max/min instructions to decodetree. | Chinmay Rath | 2 | -32/+21 |
| 2024-05-24 | target/ppc: Move VMX integer logical instructions to decodetree. | Chinmay Rath | 2 | -27/+10 |
| 2024-05-24 | target/ppc: Move VMX storage access instructions to decodetree | Chinmay Rath | 2 | -149/+91 |
| 2024-05-24 | target/ppc: Move logical fixed-point instructions to decodetree. | Chinmay Rath | 1 | -0/+300 |
| 2024-05-24 | target/ppc: Move cmp{rb, eqb}, tw[i], td[i], isel instructions to decodetree. | Chinmay Rath | 1 | -0/+132 |
| 2024-05-24 | target/ppc: Move div/mod fixed-point insns (64 bits operands) to decodetree. | Chinmay Rath | 1 | -3/+55 |
| 2024-05-24 | target/ppc: Move multiply fixed-point insns (64-bit operands) to decodetree. | Chinmay Rath | 1 | -0/+105 |
| 2024-05-24 | target/ppc: Move neg, darn, mod{sw, uw} to decodetree. | Chinmay Rath | 1 | -0/+48 |
| 2024-05-24 | target/ppc: Move divw[u, e, eu] instructions to decodetree. | Chinmay Rath | 1 | -0/+24 |
| 2024-05-24 | target/ppc: Move mul{li, lw, lwo, hw, hwu} instructions to decodetree. | Chinmay Rath | 1 | -0/+66 |
| 2024-05-24 | target/ppc: Move floating-point arithmetic instructions to decodetree. | Chinmay Rath | 2 | -207/+109 |
| 2024-05-24 | target/ppc: Add ISA v3.1 variants of sync instruction | Nicholas Piggin | 1 | -12/+29 |
| 2024-05-24 | target/ppc: Fix embedded memory barriers | Nicholas Piggin | 1 | -2/+2 |
| 2024-05-24 | target/ppc: Move sync instructions to decodetree | Nicholas Piggin | 1 | -0/+130 |
| 2024-05-24 | target/ppc: Fix broadcast tlbie synchronisation | Nicholas Piggin | 1 | -0/+7 |
| 2024-03-13 | target/ppc: Move add and subf type fixed-point arithmetic instructions to dec... | Chinmay Rath | 1 | -0/+70 |
| 2024-02-23 | target/ppc: Fix lxv/stxv MSR facility check | Nicholas Piggin | 1 | -1/+1 |
| 2024-02-20 | ppc: correct typos | Manos Pitsidianakis | 1 | -1/+1 |
| 2023-10-03 | tcg: Rename cpu_env to tcg_env | Richard Henderson | 9 | -114/+114 |
| 2023-09-20 | ppc: spelling fixes | Michael Tokarev | 1 | -3/+3 |
| 2023-09-06 | target/ppc: Fix LQ, STQ register-pair order for big-endian | Nicholas Piggin | 1 | -8/+8 |
| 2023-08-24 | target/ppc: Use tcg_gen_negsetcond_* | Richard Henderson | 2 | -7/+7 |
| 2023-06-05 | target/ppc: Inline gen_icount_io_start() | Philippe Mathieu-Daudé | 1 | -1/+1 |
| 2023-05-27 | target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs | Richard Purdie | 1 | -6/+16 |
| 2023-05-23 | target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ | Richard Henderson | 1 | -44/+7 |
| 2023-05-05 | tcg: ppc64: Fix mask generation for vextractdm | Shivaprasad G Bhat | 1 | -1/+1 |
| 2023-03-13 | target/ppc: Rewrite trans_ADDG6S | Richard Henderson | 1 | -24/+26 |
| 2023-03-13 | target/ppc: Avoid tcg_const_* in fp-impl.c.inc | Richard Henderson | 1 | -14/+12 |
| 2023-03-13 | target/ppc: Avoid tcg_const_* in vsx-impl.c.inc | Richard Henderson | 1 | -14/+14 |
| 2023-03-13 | target/ppc: Avoid tcg_const_* in xxeval | Richard Henderson | 1 | -3/+5 |
| 2023-03-13 | target/ppc: Avoid tcg_const_* in vmx-impl.c.inc | Richard Henderson | 1 | -5/+5 |
| 2023-03-13 | target/ppc: Avoid tcg_const_i64 in do_vcntmb | Richard Henderson | 1 | -10/+11 |
| 2023-03-13 | target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad | Richard Henderson | 1 | -1/+3 |
| 2023-03-13 | target/ppc: Split out gen_vx_vmul10 | Richard Henderson | 1 | -46/+49 |
| 2023-03-05 | target/ppc: Drop tcg_temp_free | Richard Henderson | 7 | -795/+7 |
| 2023-03-01 | target/ppc: Don't use tcg_temp_local_new | Richard Henderson | 2 | -6/+6 |
| 2022-10-28 | target/ppc: Use gvec to decode XVTSTDC[DS]P | Lucas Mateus Castro (alqotel) | 1 | -10/+157 |
| 2022-10-28 | target/ppc: Moved XSTSTDC[QDS]P to decodetree | Lucas Mateus Castro (alqotel) | 2 | -7/+17 |
| 2022-10-28 | target/ppc: Moved XVTSTDC[DS]P to decodetree | Lucas Mateus Castro (alqotel) | 2 | -10/+26 |
| 2022-10-28 | target/ppc: Use gvec to decode XVCPSGN[SD]P | Lucas Mateus Castro (alqotel) | 2 | -59/+53 |
| 2022-10-28 | target/ppc: Use gvec to decode XV[N]ABS[DS]P/XVNEG[DS]P | Lucas Mateus Castro (alqotel) | 2 | -12/+67 |
| 2022-10-28 | target/ppc: Move VABSDU[BHW] to decodetree and use gvec | Lucas Mateus Castro (alqotel) | 2 | -6/+46 |
| 2022-10-28 | target/ppc: Move VAVG[SU][BHW] to decodetree and use gvec | Lucas Mateus Castro (alqotel) | 2 | -18/+97 |
| 2022-10-28 | target/ppc: Move VPRTYB[WDQ] to decodetree and use gvec | Lucas Mateus Castro (alqotel) | 2 | -6/+65 |
| 2022-10-28 | target/ppc: Move VNEG[WD] to decodtree and use gvec | Lucas Mateus Castro (alqotel) | 2 | -4/+13 |
| 2022-10-28 | target/ppc: Move V(ADD|SUB)CUW to decodetree and use gvec | Lucas Mateus Castro (alqotel) | 2 | -6/+58 |
