| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-07-02 | target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro | Mark Cave-Ayland | 1 | -34/+47 |
| 2019-07-02 | target/ppc: decode target register in VSX_EXTRACT_INSERT at translation time | Mark Cave-Ayland | 1 | -5/+5 |
| 2019-07-02 | target/ppc: decode target register in VSX_VECTOR_LOAD_STORE_LENGTH at transla... | Mark Cave-Ayland | 1 | -23/+24 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_R2_AB macro to fpu_helper.c | Mark Cave-Ayland | 1 | -3/+21 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_R2 macro to fpu_helper.c | Mark Cave-Ayland | 1 | -10/+28 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_R3 macro to fpu_helper.c | Mark Cave-Ayland | 1 | -8/+28 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_X1 macro to fpu_helper.c | Mark Cave-Ayland | 1 | -4/+20 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_X2_AB macro to fpu_helper.c | Mark Cave-Ayland | 1 | -6/+24 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_X2 macro to fpu_helper.c | Mark Cave-Ayland | 1 | -60/+75 |
| 2019-07-02 | target/ppc: introduce separate generator and helper for xscvqpdp | Mark Cave-Ayland | 1 | -1/+17 |
| 2019-07-02 | target/ppc: introduce GEN_VSX_HELPER_X3 macro to fpu_helper.c | Mark Cave-Ayland | 1 | -60/+77 |
| 2019-07-02 | target/ppc: introduce separate VSX_CMP macro for xvcmp* instructions | Mark Cave-Ayland | 1 | -8/+41 |
| 2019-06-12 | target/ppc: Use tcg_gen_gvec_bitsel | Richard Henderson | 1 | -22/+2 |
| 2019-06-12 | target/ppc: Fix lxvw4x, lxvh8x and lxvb16x | Anton Blanchard | 1 | -6/+7 |
| 2019-05-29 | target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p | Anton Blanchard | 1 | -2/+2 |
| 2019-05-29 | target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE | Anton Blanchard | 1 | -10/+58 |
| 2019-05-29 | target/ppc: Fix xxspltib | Anton Blanchard | 1 | -4/+4 |
| 2019-05-29 | target/ppc: Fix xxbrq, xxbrw | Anton Blanchard | 1 | -2/+2 |
| 2019-05-29 | target/ppc: Fix xvxsigdp | Anton Blanchard | 1 | -1/+1 |
| 2019-04-26 | target/ppc: Style fixes for translate/vsx-impl.inc.c | David Gibson | 1 | -7/+8 |
| 2019-03-29 | target/ppc: Fix QEMU crash with stxsdx | Greg Kurz | 1 | -1/+1 |
| 2019-03-12 | target/ppc: Optimize x[sv]xsigdp using deposit_i64() | Philippe Mathieu-Daudé | 1 | -8/+4 |
| 2019-03-12 | target/ppc: Optimize xviexpdp() using deposit_i64() | Philippe Mathieu-Daudé | 1 | -11/+3 |
| 2019-03-12 | target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l,h}() and set_c... | Mark Cave-Ayland | 1 | -30/+4 |
| 2019-03-12 | target/ppc: introduce avr_full_offset() function | Mark Cave-Ayland | 1 | -5/+0 |
| 2019-03-12 | target/ppc: introduce single vsrl_offset() function | Mark Cave-Ayland | 1 | -6/+6 |
| 2019-02-18 | target/ppc: convert xxsel to vector operations | Richard Henderson | 1 | -28/+27 |
| 2019-02-18 | target/ppc: convert xxspltw to vector operations | Richard Henderson | 1 | -25/+11 |
| 2019-02-18 | target/ppc: convert xxspltib to vector operations | Richard Henderson | 1 | -8/+5 |
| 2019-02-18 | target/ppc: convert VSX logical operations to vector operations | Richard Henderson | 1 | -26/+17 |
| 2019-01-09 | target/ppc: move FP and VMX registers into aligned vsr register array | Mark Cave-Ayland | 1 | -2/+2 |
| 2019-01-09 | target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env | Mark Cave-Ayland | 1 | -2/+2 |
| 2019-01-09 | target/ppc: introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers for V... | Mark Cave-Ayland | 1 | -224/+638 |
| 2017-07-19 | target/ppc: optimize various functions using extract op | Philippe Mathieu-Daudé | 1 | -16/+8 |
| 2017-02-22 | target-ppc: Add xscvqpudz and xscvqpuwz instructions | Bharata B Rao | 1 | -0/+2 |
| 2017-02-22 | target-ppc: Add xsmaxjdp and xsminjdp instructions | Bharata B Rao | 1 | -0/+2 |
| 2017-02-22 | target-ppc: Add xsmaxcdp and xsmincdp instructions | Bharata B Rao | 1 | -0/+2 |
| 2017-02-22 | ppc: implement xssubqp instruction | Jose Ricardo Ziviani | 1 | -0/+1 |
| 2017-02-22 | ppc: implement xssqrtqp instruction | Jose Ricardo Ziviani | 1 | -0/+1 |
| 2017-02-22 | ppc: implement xsrqpxp instruction | Jose Ricardo Ziviani | 1 | -0/+1 |
| 2017-02-22 | ppc: implement xsrqpi[x] instruction | Jose Ricardo Ziviani | 1 | -0/+2 |
| 2017-02-02 | target-ppc: Add xststdc[sp, dp, qp] instructions | Nikunj A Dadhania | 1 | -0/+3 |
| 2017-02-02 | target-ppc: Add xvtstdc[sp,dp] instructions | Nikunj A Dadhania | 1 | -0/+2 |
| 2017-01-31 | target-ppc: Add xvcv[hpsp, sphp] instructions | Nikunj A Dadhania | 1 | -0/+2 |
| 2017-01-31 | target-ppc: Add xsmulqp instruction | Bharata B Rao | 1 | -0/+1 |
| 2017-01-31 | target-ppc: Add xsdivqp instruction | Bharata B Rao | 1 | -0/+1 |
| 2017-01-31 | target-ppc: Add xscvsdqp and xscvudqp instructions | Bharata B Rao | 1 | -0/+2 |
| 2017-01-31 | target-ppc: Add xscvqps[d,w]z instructions | Bharata B Rao | 1 | -0/+2 |
| 2017-01-31 | target-ppc: Add xvxsigdp instruction | Nikunj A Dadhania | 1 | -0/+40 |
| 2017-01-31 | target-ppc: Add xvxsigsp instruction | Nikunj A Dadhania | 1 | -0/+2 |
