riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-08-21	meson: rename included C source files to .c.inc	Paolo Bonzini	1	-1571/+0
2020-06-02	target/ppc: Use tcg_gen_gvec_rotlv	Richard Henderson	1	-4/+4
2020-05-06	target/ppc: Use tcg_gen_gvec_dup_imm	Richard Henderson	1	-14/+18
2019-10-24	target/ppc: Fix for optimized vsl/vsr instructions	Stefan Brankovic	1	-44/+40
2019-08-29	target/ppc: Refactor emulation of vmrgew and vmrgow instructions	Stefan Brankovic	1	-29/+37
2019-08-21	target/ppc: Optimize emulation of vclzw instruction	Stefan Brankovic	1	-1/+27
2019-08-21	target/ppc: Optimize emulation of vclzd instruction	Stefan Brankovic	1	-1/+27
2019-08-21	target/ppc: Optimize emulation of vgbbd instruction	Stefan Brankovic	1	-1/+76
2019-08-21	target/ppc: Optimize emulation of vsl and vsr instructions	Stefan Brankovic	1	-2/+99
2019-08-21	target/ppc: Optimize emulation of lvsl and lvsr instructions	Stefan Brankovic	1	-32/+89
2019-05-29	target/ppc: Use vector variable shifts for VSL, VSR, VSRA	Richard Henderson	1	-12/+12
2019-05-13	tcg: Specify optional vector requirements with a list	Richard Henderson	1	-1/+6
2019-04-26	target/ppc: Style fixes for translate/vmx-impl.inc.c	David Gibson	1	-11/+15
2019-03-12	target/ppc: improve avr64_offset() and use it to simplify get_avr64()/set_avr...	Mark Cave-Ayland	1	-5/+0
2019-03-12	target/ppc: introduce avr_full_offset() function	Mark Cave-Ayland	1	-11/+11
2019-02-18	target/ppc: convert vmin* and vmax* to vector operations	Richard Henderson	1	-16/+16
2019-02-18	target/ppc: convert vadds and vsubs to vector operations	Richard Henderson	1	-12/+45
2019-02-18	target/ppc: Add helper_mfvscr	Richard Henderson	1	-1/+1
2019-02-18	target/ppc: Pass integer to helper_mtvscr	Richard Henderson	1	-4/+13
2019-02-18	target/ppc: convert vsplt[bhw] to use vector operations	Richard Henderson	1	-19/+27
2019-02-18	target/ppc: convert vspltis[bhw] to use vector operations	Richard Henderson	1	-28/+8
2019-02-18	target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector oper...	Mark Cave-Ayland	1	-8/+8
2019-02-18	target/ppc: convert VMX logical instructions to use vector operations	Mark Cave-Ayland	1	-31/+16
2019-01-09	target/ppc: move FP and VMX registers into aligned vsr register array	Mark Cave-Ayland	1	-1/+6
2019-01-09	target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register ac...	Mark Cave-Ayland	1	-33/+114
2017-01-31	ppc: Implement bcdutrunc. instruction	Jose Ricardo Ziviani	1	-0/+4
2017-01-31	ppc: Implement bcdtrunc. instruction	Jose Ricardo Ziviani	1	-0/+5
2017-01-31	ppc: Implement bcdsr. instruction	Jose Ricardo Ziviani	1	-0/+1
2017-01-31	ppc: Implement bcdus. instruction	Jose Ricardo Ziviani	1	-0/+3
2017-01-31	ppc: Implement bcds. instruction	Jose Ricardo Ziviani	1	-0/+3
2017-01-31	target-ppc: add vextu[bhw][lr]x instructions	Avinesh Kumar	1	-0/+23
2017-01-31	target-ppc: Implement bcdsetsgn. instruction	Jose Ricardo Ziviani	1	-0/+8
2017-01-31	target-ppc: Implement bcdcpsgn. instruction	Jose Ricardo Ziviani	1	-0/+3
2017-01-31	target-ppc: Implement bcdctsq. instruction	Jose Ricardo Ziviani	1	-0/+7
2017-01-31	target-ppc: Implement bcdcfsq. instruction	Jose Ricardo Ziviani	1	-0/+7
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+1113