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target
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ppc
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translate.c
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Author
Files
Lines
2017-12-15
target/ppc: Use tcg_gen_lookup_and_goto_ptr
Richard Henderson
1
-15
/
+8
2017-10-27
Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging
Peter Maydell
1
-4
/
+1
2017-10-25
disas: Remove unused flags arguments
Richard Henderson
1
-1
/
+1
2017-10-25
target/ppc: Convert to disas_set_info hook
Richard Henderson
1
-4
/
+1
2017-10-24
tcg: Initialize cpu_env generically
Richard Henderson
1
-4
/
+0
2017-10-24
tcg: define tcg_init_ctx and make tcg_ctx a pointer
Emilio G. Cota
1
-1
/
+1
2017-10-24
tcg: convert tb->cflags reads to tb_cflags(tb)
Emilio G. Cota
1
-3
/
+3
2017-10-24
qom: Introduce CPUClass.tcg_initialize
Richard Henderson
1
-6
/
+0
2017-10-24
tcg: Remove TCGV_EQUAL*
Richard Henderson
1
-2
/
+2
2017-10-17
target/ppc: Fix carry flag setting for shift algebraic instructions
Sandipan Das
1
-0
/
+12
2017-08-31
ppc: use DIV_ROUND_UP
Marc-André Lureau
1
-1
/
+1
2017-07-19
tcg: Pass generic CPUState to gen_intermediate_code()
Lluís Vilanova
1
-3
/
+2
2017-07-19
target/ppc: optimize various functions using extract op
Philippe Mathieu-Daudé
1
-14
/
+7
2017-05-11
target/ppc: Change tlbie invalid fields for POWER9 support
Suraj Jitindar Singh
1
-0
/
+2
2017-05-11
target/ppc: Update tlbie to check privilege level based on GTSE
Suraj Jitindar Singh
1
-1
/
+8
2017-05-11
target/ppc: Generate fence operations
Nikunj A Dadhania
1
-0
/
+8
2017-05-11
target/ppc: Emulate LL/SC using cmpxchg helpers
Nikunj A Dadhania
1
-6
/
+23
2017-03-14
target/ppc: fix cpu_ov setting for 32-bit
Nikunj A Dadhania
1
-1
/
+1
2017-03-03
spapr: Small cleanup of PPC MMU enums
Sam Bobroff
1
-8
/
+6
2017-03-03
target/ppc: Don't gen an SDR1 on POWER9 and rework register creation
Suraj Jitindar Singh
1
-2
/
+5
2017-03-01
target/ppc: add mcrxrx instruction
Nikunj A Dadhania
1
-0
/
+23
2017-03-01
target/ppc: add ov32 flag in divide operations
Nikunj A Dadhania
1
-2
/
+8
2017-03-01
target/ppc: add ov32 flag for multiply low insns
Nikunj A Dadhania
1
-0
/
+6
2017-03-01
target/ppc: use tcg ops for neg instruction
Nikunj A Dadhania
1
-1
/
+4
2017-03-01
target/ppc: update overflow flags for add/sub
Nikunj A Dadhania
1
-2
/
+9
2017-03-01
target/ppc: update ca32 in arithmetic substract
Nikunj A Dadhania
1
-1
/
+10
2017-03-01
target/ppc: update ca32 in arithmetic add
Nikunj A Dadhania
1
-0
/
+21
2017-03-01
target/ppc: support for 32-bit carry and overflow
Nikunj A Dadhania
1
-3
/
+18
2017-03-01
target/ppc: optimize gen_write_xer()
Nikunj A Dadhania
1
-6
/
+3
2017-02-22
target-ppc: add wait instruction
Nikunj A Dadhania
1
-0
/
+1
2017-02-22
target-ppc: add slbsync implementation
Nikunj A Dadhania
1
-0
/
+12
2017-02-22
target-ppc: add slbieg instruction
Nikunj A Dadhania
1
-0
/
+14
2017-02-22
target-ppc: generate exception for copy/paste
Nikunj A Dadhania
1
-0
/
+15
2017-02-22
target-ppc: implement store atomic instruction
Balamuruhan S
1
-0
/
+52
2017-02-22
target-ppc: implement load atomic instruction
Balamuruhan S
1
-0
/
+59
2017-02-02
tcg/POWER9: NOOP the cp_abort instruction
Suraj Jitindar Singh
1
-0
/
+5
2017-02-02
target/ppc/debug: Print LPCR register value if register exists
Suraj Jitindar Singh
1
-0
/
+3
2017-01-31
target-ppc: implement stop instruction
Nikunj A Dadhania
1
-0
/
+6
2017-01-31
target-ppc: implement lxv/lxvx and stxv/stxvx
Nikunj A Dadhania
1
-2
/
+8
2017-01-31
target-ppc: implement stxsd and stxssp
Nikunj A Dadhania
1
-0
/
+34
2017-01-31
target-ppc: implement lxsd and lxssp instructions
Nikunj A Dadhania
1
-0
/
+25
2017-01-31
target-ppc: rename CRF_* defines as CRF_*_BIT
Nikunj A Dadhania
1
-7
/
+7
2017-01-31
target-ppc: Consolidate instruction decode helpers
Bharata B Rao
1
-151
/
+0
2017-01-10
target-ppc: Use ctpop helper
Richard Henderson
1
-1
/
+5
2017-01-10
target-ppc: Use clz and ctz opcodes
Richard Henderson
1
-4
/
+16
2017-01-10
target-ppc: Use the new deposit and extract ops
Richard Henderson
1
-16
/
+19
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth
1
-0
/
+7200