riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-11-02	target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu	Richard Henderson	1	-5/+3
2021-11-02	target/ppc: Implement ppc_cpu_record_sigsegv	Richard Henderson	1	-0/+9
2021-09-21	hw/core: Make do_unaligned_access noreturn	Richard Henderson	1	-2/+2
2021-08-27	target/ppc: divided mmu_helper.c in 2 files	Lucas Mateus Castro (alqotel)	1	-0/+39
2021-06-03	target/ppc: removed all mentions to PPC_DUMP_CPU	Bruno Larsen (billionai)	1	-2/+0
2021-05-19	target/ppc: Introduce prot_for_access_type	Richard Henderson	1	-0/+19
2021-05-04	target/ppc: move opcode table logic to translate.c	Bruno Larsen (billionai)	1	-0/+8
2021-05-04	target/ppc: code motion from translate_init.c.inc to gdbstub.c	Bruno Larsen (billionai)	1	-0/+5
2020-11-15	powerpc tcg: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-10-28	ppc/: fix some comment spelling errors	zhaolichang	1	-1/+1
2019-10-04	ppc: Add support for 'mffscrn','mffscrni' instructions	Paul A. Clarke	1	-0/+3
2019-07-02	target/ppc: remove getVSR()/putVSR() from int_helper.c	Mark Cave-Ayland	1	-12/+0
2019-03-12	target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian...	Mark Cave-Ayland	1	-4/+4
2019-03-12	target/ppc: move Vsr* macros from internal.h to cpu.h	Mark Cave-Ayland	1	-19/+0
2019-02-04	target/ppc: implement complete set of Vsr* macros	Mark Cave-Ayland	1	-1/+8
2019-01-09	target/ppc: move FP and VMX registers into aligned vsr register array	Mark Cave-Ayland	1	-14/+4
2019-01-09	target/ppc: merge ppc_vsr_t and ppc_avr_t union types	Mark Cave-Ayland	1	-11/+0
2019-01-09	target/ppc: switch EXTRACT_HELPER macros over to use sextract32/extract32	Mark Cave-Ayland	1	-4/+4
2019-01-09	target/ppc: fix typo in SIMM5 extraction helper	Mark Cave-Ayland	1	-1/+1
2018-07-03	target/ppc: Add do_unaligned_access hook	Richard Henderson	1	-0/+5
2017-02-22	target-ppc: implement load atomic instruction	Balamuruhan S	1	-0/+2
2017-02-22	ppc: implement xsrqpi[x] instruction	Jose Ricardo Ziviani	1	-0/+1
2017-02-02	target-ppc: Add xststdc[sp, dp, qp] instructions	Nikunj A Dadhania	1	-0/+1
2017-02-02	target-ppc: Add xvtstdc[sp,dp] instructions	Nikunj A Dadhania	1	-2/+3
2017-01-31	target-ppc: Add xsaddqp instructions	Bharata B Rao	1	-0/+2
2017-01-31	target-ppc: Use correct precision for FPRF setting	Bharata B Rao	1	-0/+1
2017-01-31	target-ppc: Add xscvdphp, xscvhpdp	Bharata B Rao	1	-0/+3
2017-01-31	target-ppc: move ppc_vsr_t to common header	Nikunj A Dadhania	1	-0/+42
2017-01-31	target-ppc: implement lxv/lxvx and stxv/stxvx	Nikunj A Dadhania	1	-0/+1
2017-01-31	target-ppc: Consolidate instruction decode helpers	Bharata B Rao	1	-0/+151
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+50