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path: root/target/ppc/int_helper.c
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2021-11-09target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructionsMatheus Ferst1-0/+15
2021-11-09target/ppc: Implement Vector Extract Double to VSR using GPR index insnsMatheus Ferst1-0/+39
2021-11-09target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetreeMatheus Ferst1-21/+0
2021-11-09target/ppc: Implement Vector Insert from GPR using GPR index insnsMatheus Ferst1-0/+30
2021-11-09target/ppc: Implement vpdepd/vpextd instructionMatheus Ferst1-2/+0
2021-11-09target/ppc: Move vcfuged to vmx-impl.c.incMatheus Ferst1-1/+1
2021-11-09target/ppc: Implement pextd instructionMatheus Ferst1-0/+18
2021-11-09target/ppc: Implement pdepd instructionMatheus Ferst1-0/+20
2021-10-27host-utils: add 128-bit quotient support to divu128/divs128Luis Pires1-4/+5
2021-10-27host-utils: move checks out of divu128/divs128Luis Pires1-5/+9
2021-09-29target/ppc: fix setting of CR flags in bcdcfsqLuis Pires1-13/+48
2021-08-27target/ppc: fix vextu[bhw][lr]x helpersMatheus Ferst1-28/+10
2021-06-03target/ppc: Implement cfuged instructionMatheus Ferst1-0/+62
2021-05-19target/ppc: created ppc_{store,get}_vscr for generic vscr usageBruno Larsen (billionai)1-7/+2
2021-05-04target/ppc: Move helper_regs.h functions out-of-lineRichard Henderson1-0/+1
2021-03-10target/ppc: Fix bcdsub. emulation when result overflowsFabiano Rosas1-3/+10
2020-11-15powerpc tcg: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-08-24Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20200818' into...Peter Maydell1-13/+35
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-1/+1
2020-08-12target/ppc: add vmulh{su}d instructionsLijun Pan1-0/+16
2020-08-12target/ppc: add vmulh{su}w instructionsLijun Pan1-0/+19
2020-08-12target/ppc: convert vmuluwm to tcg_gen_gvec_mulLijun Pan1-13/+0
2020-06-02target/ppc: Use tcg_gen_gvec_rotlvRichard Henderson1-17/+0
2020-05-19softfloat: Name compare relation enumRichard Henderson1-6/+7
2019-10-04target/ppc: use Vsr macros in BCD helpersMark Cave-Ayland1-47/+25
2019-08-21target/ppc: Optimize emulation of vclzw instructionStefan Brankovic1-3/+0
2019-08-21target/ppc: Optimize emulation of vclzd instructionStefan Brankovic1-3/+0
2019-08-21target/ppc: Optimize emulation of vgbbd instructionStefan Brankovic1-276/+0
2019-08-21target/ppc: Optimize emulation of vsl and vsr instructionsStefan Brankovic1-35/+0
2019-08-21target/ppc: Optimize emulation of lvsl and lvsr instructionsStefan Brankovic1-18/+0
2019-08-16Include qemu/main-loop.h lessMarkus Armbruster1-0/+2
2019-07-02target/ppc: decode target register in VSX_EXTRACT_INSERT at translation timeMark Cave-Ayland1-8/+4
2019-07-02target/ppc: remove getVSR()/putVSR() from int_helper.cMark Cave-Ayland1-12/+10
2019-05-29target/ppc: Use vector variable shifts for VSL, VSR, VSRARichard Henderson1-37/+0
2019-05-29target/ppc: Fix vsum2swsAnton Blanchard1-1/+1
2019-05-29target/ppc: Fix vslv and vsrvAnton Blanchard1-7/+7
2019-05-22target/ppc: Use qemu_guest_getrandom for DARNRichard Henderson1-11/+26
2019-04-26target/ppc: Style fixes for int_helper.cDavid Gibson1-31/+39
2019-02-18target/ppc: convert vmin* and vmax* to vector operationsRichard Henderson1-27/+0
2019-02-18target/ppc: convert vadd*s and vsub*s to vector operationsRichard Henderson1-14/+4
2019-02-18target/ppc: Split out VSCR_SAT to a vector fieldRichard Henderson1-3/+8
2019-02-18target/ppc: Add set_vscr_satRichard Henderson1-12/+17
2019-02-18target/ppc: Add helper_mfvscrRichard Henderson1-0/+5
2019-02-18target/ppc: Pass integer to helper_mtvscrRichard Henderson1-3/+3
2019-02-18target/ppc: convert vsplt[bhw] to use vector operationsRichard Henderson1-19/+0
2019-02-18target/ppc: convert vspltis[bhw] to use vector operationsRichard Henderson1-15/+0
2019-02-18target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector oper...Mark Cave-Ayland1-7/+0
2019-02-04target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.cMark Cave-Ayland1-110/+45
2019-02-04target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.cMark Cave-Ayland1-28/+20
2019-02-04target/ppc: simplify VEXT_SIGNED macro in int_helper.cMark Cave-Ayland1-7/+7
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