riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-05-26	target/ppc: Implemented xviger instructions	Lucas Mateus Castro (alqotel)	1	-0/+18
2022-05-26	target/ppc: Implement xxm[tf]acc and xxsetaccz	Lucas Mateus Castro (alqotel)	1	-0/+9
2022-05-26	target/ppc: declare vmsumsh[ms] helper with call flags	Matheus Ferst	1	-0/+2
2022-05-26	target/ppc: declare vmsumuh[ms] helper with call flags	Matheus Ferst	1	-0/+2
2022-05-26	target/ppc: declare vmsum[um]bm helpers with call flags	Matheus Ferst	1	-0/+3
2022-05-26	target/ppc: declare xxextractuw and xxinsertw helpers with call flags	Matheus Ferst	1	-2/+7
2022-05-26	target/ppc: declare xvxsigsp helper with call flags	Matheus Ferst	1	-0/+4
2022-05-26	target/ppc: declare xscvspdpn helper with call flags	Matheus Ferst	1	-0/+1
2022-05-26	target/ppc: Use TCG_CALL_NO_RWG_SE in fsel helper	Matheus Ferst	1	-0/+7
2022-04-20	target/ppc: implement xscvqp[su]qz	Matheus Ferst	1	-0/+2
2022-04-20	target/ppc: implement xscv[su]qqp	Matheus Ferst	1	-0/+5
2022-03-02	target/ppc: implement lxvr[bhwd]/stxvr[bhwd]x	Lucas Coutinho	1	-0/+8
2022-03-02	target/ppc: implement plxssp/pstxssp	Leandro Lupori	1	-0/+2
2022-03-02	target/ppc: implement plxsd/pstxsd	Leandro Lupori	1	-0/+2
2022-03-02	target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions	Víctor Colombo	1	-3/+8
2022-03-02	target/ppc: Implement xs{max,min}cqp	Víctor Colombo	1	-0/+3
2022-03-02	target/ppc: Move xscmp{eq,ge,gt}dp to decodetree	Víctor Colombo	1	-0/+3
2022-03-02	target/ppc: Implement xscmp{eq,ge,gt}qp	Víctor Colombo	1	-0/+3
2022-03-02	target/ppc: Implement xvtlsbb instruction	Víctor Colombo	1	-0/+7
2022-03-02	target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o]	Matheus Ferst	1	-0/+4
2022-03-02	target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree	Matheus Ferst	1	-0/+22
2022-03-02	target/ppc: Implement xxgenpcv[bhwd]m instruction	Matheus Ferst	1	-0/+10
2022-03-02	target/ppc: Move xxpermdi to decodetree	Matheus Ferst	1	-0/+4
2022-03-02	target/ppc: move xxperm/xxpermr to decodetree	Matheus Ferst	1	-0/+5
2022-03-02	target/ppc: Move xxsel to decodetree	Matheus Ferst	1	-0/+6
2022-03-02	target/ppc: Move vsel and vperm/vpermr to decodetree	Matheus Ferst	1	-0/+5
2022-03-02	target/ppc: implement vrlqmi	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: implement vrlqnm	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: implement vrlq	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: move vrl[bhwd]nm/vrl[bhwd]mi to decodetree	Matheus Ferst	1	-0/+6
2022-03-02	target/ppc: move vrl[bhwd] to decodetree	Matheus Ferst	1	-0/+5
2022-03-02	target/ppc: implement vsraq	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: implement vsrq	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: implement vslq	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: move vs[lr][a][bhwd] to decodetree	Matheus Ferst	1	-0/+17
2022-03-02	target/ppc: implement vgnb	Matheus Ferst	1	-0/+5
2022-03-02	target/ppc: implement vcntmb[bhwd]	Matheus Ferst	1	-0/+8
2022-03-02	target/ppc: implement vclrrb	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: implement vclrlb	Matheus Ferst	1	-0/+2
2022-03-02	target/ppc: implement vstri[bh][lr]	Matheus Ferst	1	-0/+10
2022-03-02	target/ppc: Implement Vector Compare Quadword	Matheus Ferst	1	-0/+6
2022-03-02	target/ppc: Implement Vector Compare Greater Than Quadword	Matheus Ferst	1	-0/+2
2022-03-02	target/ppc: Implement Vector Compare Equal Quadword	Matheus Ferst	1	-0/+1
2022-03-02	target/ppc: Move Vector Compare Not Equal or Zero to decodetree	Matheus Ferst	1	-0/+4
2022-03-02	target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree	Matheus Ferst	1	-0/+24
2022-03-02	target/ppc: Implement vextsd2q	Lucas Coutinho	1	-0/+1
2022-03-02	target/ppc: Move vexts[bhw]2[wd] to decodetree	Lucas Coutinho	1	-0/+8
2022-03-02	target/ppc: Implement vmsumudm instruction	Víctor Colombo	1	-0/+1
2022-03-02	target/ppc: Implement vmsumcud instruction	Víctor Colombo	1	-0/+4
2022-03-02	target/ppc: Moved vector multiply high and low to decodetree	Lucas Mateus Castro (alqotel)	1	-0/+6