| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-03-06 | target/ppc: use helper for excp handling | Nikunj A Dadhania | 1 | -18/+2 |
| 2017-03-06 | target/ppc: fmadd: add macro for updating flags | Nikunj A Dadhania | 1 | -31/+30 |
| 2017-03-06 | target/ppc: fmadd check for excp independently | Nikunj A Dadhania | 1 | -8/+12 |
| 2017-03-03 | target/ppc: rewrite f[n]m[add,sub] using float64_muladd | Nikunj A Dadhania | 1 | -167/+46 |
| 2017-02-22 | target-ppc: Add xscvqpudz and xscvqpuwz instructions | Bharata B Rao | 1 | -0/+2 |
| 2017-02-22 | target-ppc: Implement round to odd variants of quad FP instructions | Bharata B Rao | 1 | -22/+20 |
| 2017-02-22 | target-ppc: Add xsmaxjdp and xsminjdp instructions | Bharata B Rao | 1 | -0/+55 |
| 2017-02-22 | target-ppc: Add xsmaxcdp and xsmincdp instructions | Bharata B Rao | 1 | -0/+38 |
| 2017-02-22 | ppc: implement xssubqp instruction | Jose Ricardo Ziviani | 1 | -0/+34 |
| 2017-02-22 | ppc: implement xssqrtqp instruction | Jose Ricardo Ziviani | 1 | -0/+38 |
| 2017-02-22 | ppc: implement xsrqpxp instruction | Jose Ricardo Ziviani | 1 | -0/+56 |
| 2017-02-22 | ppc: implement xsrqpi[x] instruction | Jose Ricardo Ziviani | 1 | -0/+59 |
| 2017-02-02 | target-ppc: Add xststdc[sp, dp, qp] instructions | Nikunj A Dadhania | 1 | -8/+58 |
| 2017-02-02 | target-ppc: Add xvtstdc[sp,dp] instructions | Nikunj A Dadhania | 1 | -0/+40 |
| 2017-01-31 | target-ppc: Add xvcv[hpsp, sphp] instructions | Nikunj A Dadhania | 1 | -9/+18 |
| 2017-01-31 | target-ppc: Add xsmulqp instruction | Bharata B Rao | 1 | -0/+35 |
| 2017-01-31 | target-ppc: Add xsdivqp instruction | Bharata B Rao | 1 | -0/+36 |
| 2017-01-31 | target-ppc: Add xscvsdqp and xscvudqp instructions | Bharata B Rao | 1 | -0/+25 |
| 2017-01-31 | target-ppc: Use ppc_vsr_t.f128 in xscmp[o,u,exp]qp | Bharata B Rao | 1 | -12/+8 |
| 2017-01-31 | target-ppc: Add xscvqps[d,w]z instructions | Bharata B Rao | 1 | -0/+40 |
| 2017-01-31 | target-ppc: Add xvxsigsp instruction | Nikunj A Dadhania | 1 | -0/+20 |
| 2017-01-31 | target-ppc: xscvqpdp zero VSR | Nikunj A Dadhania | 1 | -1/+1 |
| 2017-01-31 | target-ppc: Add xscvqpdp instruction | Bharata B Rao | 1 | -0/+28 |
| 2017-01-31 | target-ppc: Add xscvdpqp instruction | Bharata B Rao | 1 | -0/+45 |
| 2017-01-31 | target-ppc: Add xsaddqp instructions | Bharata B Rao | 1 | -0/+36 |
| 2017-01-31 | target-ppc: Use correct precision for FPRF setting | Bharata B Rao | 1 | -2/+2 |
| 2017-01-31 | target-ppc: Add xscvdphp, xscvhpdp | Bharata B Rao | 1 | -0/+33 |
| 2017-01-31 | target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 | Bharata B Rao | 1 | -59/+62 |
| 2017-01-31 | target-ppc: Replace isden by float64_is_zero_or_denormal | Bharata B Rao | 1 | -10/+1 |
| 2017-01-31 | target-ppc: Use float64 arg in helper_compute_fprf() | Bharata B Rao | 1 | -9/+7 |
| 2017-01-31 | target-ppc: Add xxperm and xxpermr instructions | Bharata B Rao | 1 | -0/+23 |
| 2017-01-31 | target-ppc: move ppc_vsr_t to common header | Nikunj A Dadhania | 1 | -37/+0 |
| 2017-01-31 | target-ppc: Add xscmpoqp and xscmpuqp instructions | Bharata B Rao | 1 | -0/+54 |
| 2017-01-31 | target-ppc: Add xscmpexp[dp,qp] instructions | Bharata B Rao | 1 | -0/+64 |
| 2017-01-31 | target-ppc: Fix xscmpodp and xscmpudp instructions | Bharata B Rao | 1 | -15/+25 |
| 2017-01-31 | target-ppc: Consolidate instruction decode helpers | Bharata B Rao | 1 | -10/+1 |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth | 1 | -0/+2789 |
