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path: root/target/ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2023-09-06spapr: Fix machine reset deadlock from replay-recordNicholas Piggin1-0/+1
2023-09-06target/ppc: Fix CPU reservation migration for record-replayNicholas Piggin1-0/+2
2023-09-06target/ppc: Implement watchpoint debug facility for v2.07SNicholas Piggin1-0/+4
2023-09-06target/ppc: Implement breakpoint debug facility for v2.07SNicholas Piggin1-0/+3
2023-09-06ppc: Add stub implementation of TRIG SPRsJoel Stanley1-0/+2
2023-07-07target/ppc: Move CPU QOM definitions to cpu-qom.hPhilippe Mathieu-Daudé1-4/+0
2023-07-07target/ppc: Add LPAR-per-core vs per-thread mode flagNicholas Piggin1-0/+3
2023-06-28target/ppc: Restrict KVM-specific fields from ArchCPUPhilippe Mathieu-Daudé1-0/+2
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson1-4/+4
2023-06-25target/ppc: Add initial flags and helpers for SMT supportNicholas Piggin1-0/+9
2023-06-25target/ppc: Implement HEIR SPRNicholas Piggin1-0/+1
2023-06-10target/ppc: Implement gathering irq statisticsBALATON Zoltan1-0/+1
2023-06-10target/ppc: Ensure stcx size matches larxNicholas Piggin1-2/+3
2023-06-10target/ppc: Remove some unneded line breaksBALATON Zoltan1-5/+3
2023-06-10target/ppc: Move ppcemb_tlb_search() to mmu_common.cBALATON Zoltan1-3/+1
2023-06-10target/ppc: Remove "ext" parameter of ppcemb_tlb_check()BALATON Zoltan1-2/+1
2023-06-05tcg: Remove NO_CPU_IO_DEFSRichard Henderson1-2/+0
2023-05-23target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQRichard Henderson1-1/+0
2023-05-05ppc: spapr: cleanup cr get/set with helpers.Harsh Prateek Bora1-0/+2
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé1-1/+1
2022-12-21target/ppc: Implement the DEXCR and HDEXCRNicholas Miehlbradt1-0/+19
2022-10-28target/ppc: Add new PMC HFLAGSLeandro Lupori1-1/+3
2022-10-28target/ppc: introduce ppc_maybe_interruptMatheus Ferst1-0/+1
2022-10-28target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY buildsMatheus Ferst1-1/+1
2022-10-28target/ppc: define PPC_INTERRUPT_* values directlyMatheus Ferst1-20/+20
2022-10-06dump: Replace opaque DumpState pointer with a typed oneJanosch Frank1-2/+2
2022-09-20target/ppc: Remove unused xer_* macrosVíctor Colombo1-4/+0
2022-09-20target/ppc: Remove extra space from s128 field in ppc_vsr_tVíctor Colombo1-1/+1
2022-09-20target/ppc: Add HASHKEYR and HASHPKEYR SPRsVíctor Colombo1-0/+2
2022-07-18target/ppc: remove mfdcrux and mtdcruxMatheus Ferst1-4/+2
2022-07-18ppc: Remove unused irq_inputsCédric Le Goater1-1/+0
2022-07-06target/ppc: Add flag for ISA v2.06 BCDA instructionsMatheus Ferst1-1/+4
2022-07-06ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy1-0/+12
2022-07-06target/ppc: Change FPSCR_* to follow POWER ISA numbering conventionVíctor Colombo1-36/+36
2022-05-26target/ppc: Implemented xvf16ger*Lucas Mateus Castro (alqotel)1-0/+3
2022-05-26target/ppc: Implemented xvf*ger*Lucas Mateus Castro (alqotel)1-0/+4
2022-05-26target/ppc: Implemented xvi*ger* instructionsLucas Mateus Castro (alqotel)1-0/+1
2022-05-26target/ppc: Implement xxm[tf]acc and xxsetacczLucas Mateus Castro (alqotel)1-0/+5
2022-05-26target/ppc: Implement lwsync with weaker memory orderingNicholas Piggin1-1/+3
2022-05-26target/ppc: Fix FPSCR.FI bit being cleared when it shouldn'tVíctor Colombo1-0/+2
2022-05-05target/ppc: Change MSR_* to follow POWER ISA numbering conventionVíctor Colombo1-43/+44
2022-05-05target/ppc: Add unused msr bits FIELDsVíctor Colombo1-0/+25
2022-05-05target/ppc: Remove msr_de macroVíctor Colombo1-2/+1
2022-05-05target/ppc: Remove msr_hv macroVíctor Colombo1-5/+6
2022-05-05target/ppc: Remove msr_ts macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_fe0 and msr_fe1 macrosVíctor Colombo1-2/+9
2022-05-05target/ppc: Remove msr_ep macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_dr macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_ir macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_cm macroVíctor Colombo1-1/+1
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