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openrisc
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Author
Files
Lines
2023-07-25
other architectures: spelling fixes
Michael Tokarev
2
-3
/
+3
2023-06-26
target: Widen pc/cs_base in cpu_get_tb_cpu_state
Anton Johansson
1
-3
/
+2
2023-06-20
meson: Replace softmmu_ss -> system_ss
Philippe Mathieu-Daudé
1
-3
/
+3
2023-06-05
accel/tcg: Introduce translator_io_start
Richard Henderson
1
-6
/
+3
2023-06-05
tcg: Add insn_start_words to TCGContext
Richard Henderson
1
-1
/
+1
2023-06-05
tcg: Pass TCGHelperInfo to tcg_gen_callN
Richard Henderson
1
-0
/
+5
2023-06-05
*: Add missing includes of tcg/tcg.h
Richard Henderson
1
-0
/
+1
2023-05-11
target/openrisc: Setup FPU for detecting tininess before rounding
Stafford Horne
1
-0
/
+4
2023-05-11
target/openrisc: Set PC to cpu state on FPU exception
Stafford Horne
1
-2
/
+11
2023-05-11
target/openrisc: Allow fpcsr access in user mode
Stafford Horne
2
-51
/
+66
2023-03-13
target/openrisc: Remove `NB_MMU_MODES` define
Anton Johansson
1
-1
/
+0
2023-03-07
gdbstub: move register helpers into standalone include
Alex Bennée
3
-3
/
+3
2023-03-05
target/openrisc: Drop tcg_temp_free
Richard Henderson
1
-39
/
+0
2023-03-01
accel/tcg: Pass max_insn to gen_intermediate_code by pointer
Richard Henderson
1
-1
/
+1
2023-03-01
target/openrisc: Replace `tb_pc()` with `tb->pc`
Anton Johansson
1
-1
/
+3
2023-02-27
target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu
Philippe Mathieu-Daudé
1
-1
/
+2
2022-12-16
target/openrisc: Convert to 3-phase reset
Peter Maydell
2
-6
/
+10
2022-11-01
accel/tcg: Remove will_exit argument from cpu_restore_state
Richard Henderson
1
-2
/
+2
2022-11-01
target/openrisc: Use cpu_unwind_state_data for mfspr
Richard Henderson
1
-2
/
+9
2022-11-01
target/openrisc: Always exit after mtspr npc
Richard Henderson
1
-1
/
+1
2022-10-26
target/openrisc: Convert to tcg_ops restore_state_to_opc
Richard Henderson
2
-10
/
+13
2022-10-04
accel/tcg: Introduce tb_pc and log_pc
Richard Henderson
1
-1
/
+1
2022-10-04
hw/core: Add CPUClass.get_pc
Richard Henderson
1
-0
/
+8
2022-09-06
accel/tcg: Add pc and host_pc params to gen_intermediate_code
Richard Henderson
1
-2
/
+4
2022-09-04
target/openrisc: Interrupt handling fixes
Stafford Horne
2
-1
/
+7
2022-09-04
target/openrisc: Enable MTTCG
Stafford Horne
2
-1
/
+8
2022-09-04
target/openrisc: Add interrupted CPU to log
Stafford Horne
1
-1
/
+3
2022-09-04
target/openrisc: Fix memory reading in debugger
Stafford Horne
1
-1
/
+7
2022-05-15
Merge tag 'or1k-pull-request-20220515' of https://github.com/stffrdhrn/qemu i...
Richard Henderson
1
-0
/
+11
2022-05-15
target/openrisc: Do not reset delay slot flag on early tb exit
Stafford Horne
1
-0
/
+11
2022-05-11
Normalize header guard symbol definition
Markus Armbruster
1
-1
/
+1
2022-04-21
compiler.h: replace QEMU_NORETURN with G_NORETURN
Marc-André Lureau
3
-3
/
+4
2022-04-20
exec/translator: Pass the locked filepointer to disas_log hook
Richard Henderson
1
-3
/
+4
2022-04-06
Move CPU softfloat unions to cpu-float.h
Marc-André Lureau
1
-0
/
+1
2022-03-06
target: Use ArchCPU as interface to target CPU
Philippe Mathieu-Daudé
1
-1
/
+1
2022-03-06
target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro
Philippe Mathieu-Daudé
1
-7
/
+1
2022-03-06
target: Use CPUArchState as interface to target-specific CPU state
Philippe Mathieu-Daudé
1
-2
/
+1
2022-03-06
target: Use forward declared type instead of structure type
Philippe Mathieu-Daudé
1
-2
/
+2
2022-02-21
exec/exec-all: Move 'qemu/log.h' include in units requiring it
Philippe Mathieu-Daudé
2
-0
/
+2
2022-01-28
Remove unnecessary minimum_version_id_old fields
Peter Maydell
1
-1
/
+0
2021-11-02
target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
Richard Henderson
4
-14
/
+6
2021-10-15
target/openrisc: Drop checks for singlestep_enabled
Richard Henderson
1
-15
/
+3
2021-09-21
include/exec: Move cpu_signal_handler declaration
Richard Henderson
1
-2
/
+0
2021-09-14
target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu
Philippe Mathieu-Daudé
4
-7
/
+8
2021-09-14
accel/tcg: Add DisasContextBase argument to translator_ld*
Ilya Leoshkevich
1
-1
/
+1
2021-07-21
accel/tcg: Remove TranslatorOps.breakpoint_check
Richard Henderson
1
-17
/
+0
2021-07-13
target/openrisc: Use dc->zero in gen_add, gen_addc
Richard Henderson
1
-5
/
+5
2021-07-13
target/openrisc: Cache constant 0 in DisasContext
Richard Henderson
1
-6
/
+6
2021-07-13
target/openrisc: Use tcg_constant_tl for dc->R0
Richard Henderson
1
-8
/
+2
2021-07-13
target/openrisc: Use tcg_constant_*
Richard Henderson
1
-33
/
+9
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