riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-05-10	kconfig: express dependency of individual boards on libfdt	Paolo Bonzini	1	-0/+1
2024-05-06	accel/tcg: Access tcg_cflags with getter / setter	Philippe Mathieu-Daudé	1	-1/+1
2024-05-06	exec/cpu: Extract page-protection definitions to page-protection.h	Philippe Mathieu-Daudé	1	-0/+1
2024-04-26	target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'	Philippe Mathieu-Daudé	2	-2/+2
2024-04-25	hw, target: Add ResetType argument to hold and exit phase methods	Peter Maydell	1	-2/+2
2024-03-12	target/openrisc: Prefer fast cpu_env() over slower CPU QOM cast macro	Philippe Mathieu-Daudé	3	-12/+6
2024-03-12	target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler	Philippe Mathieu-Daudé	1	-4/+4
2024-02-03	include/exec: Change cpu_mmu_index argument to CPUState	Richard Henderson	1	-1/+1
2024-02-03	include/exec: Implement cpu_mmu_index generically	Richard Henderson	2	-7/+1
2024-02-03	target/openrisc: Populate CPUClass.mmu_index	Richard Henderson	2	-8/+15
2024-01-29	include/qemu: Add TCGCPUOps typedef to typedefs.h	Richard Henderson	1	-1/+1
2024-01-29	target: Use vaddr in gen_intermediate_code	Anton Johansson	1	-1/+1
2024-01-08	system/cpus: rename qemu_mutex_lock_iothread() to bql_lock()	Stefan Hajnoczi	1	-8/+8
2024-01-05	target/openrisc: Use generic cpu_list()	Gavin Shan	2	-45/+0
2024-01-05	cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()	Philippe Mathieu-Daudé	1	-3/+1
2023-12-29	target/openrisc: Constify VMState in machine.c	Richard Henderson	1	-4/+4
2023-11-07	hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()	Philippe Mathieu-Daudé	1	-2/+1
2023-11-07	target: Move ArchCPUClass definition to 'cpu.h'	Philippe Mathieu-Daudé	1	-1/+0
2023-11-07	target/openrisc: Declare QOM definitions in 'cpu-qom.h'	Philippe Mathieu-Daudé	2	-9/+23
2023-11-07	target: Unify QOM style	Philippe Mathieu-Daudé	1	-4/+0
2023-10-07	meson: Rename target_softmmu_arch -> target_system_arch	Philippe Mathieu-Daudé	1	-1/+1
2023-10-04	accel/tcg: Remove cpu_set_cpustate_pointers	Richard Henderson	1	-5/+1
2023-10-04	accel/tcg: Replace CPUState.env_ptr with cpu_env()	Richard Henderson	1	-1/+1
2023-10-03	tcg: Rename cpu_env to tcg_env	Richard Henderson	1	-42/+42
2023-10-03	accel/tcg: Move CPUNegativeOffsetState into CPUState	Richard Henderson	1	-1/+0
2023-10-03	target/*: Add instance_align to all cpu base classes	Richard Henderson	1	-0/+1
2023-08-31	target/translate: Remove unnecessary 'exec/cpu_ldst.h' header	Philippe Mathieu-Daudé	1	-1/+0
2023-08-24	target/openrisc: Use tcg_gen_negsetcond_*	Richard Henderson	1	-4/+2
2023-07-31	target/openrisc: Set EPCR to next PC on FPE exceptions	Stafford Horne	1	-3/+4
2023-07-25	other architectures: spelling fixes	Michael Tokarev	2	-3/+3
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	1	-3/+2
2023-06-20	meson: Replace softmmu_ss -> system_ss	Philippe Mathieu-Daudé	1	-3/+3
2023-06-05	accel/tcg: Introduce translator_io_start	Richard Henderson	1	-6/+3
2023-06-05	tcg: Add insn_start_words to TCGContext	Richard Henderson	1	-1/+1
2023-06-05	tcg: Pass TCGHelperInfo to tcg_gen_callN	Richard Henderson	1	-0/+5
2023-06-05	*: Add missing includes of tcg/tcg.h	Richard Henderson	1	-0/+1
2023-05-11	target/openrisc: Setup FPU for detecting tininess before rounding	Stafford Horne	1	-0/+4
2023-05-11	target/openrisc: Set PC to cpu state on FPU exception	Stafford Horne	1	-2/+11
2023-05-11	target/openrisc: Allow fpcsr access in user mode	Stafford Horne	2	-51/+66
2023-03-13	target/openrisc: Remove `NB_MMU_MODES` define	Anton Johansson	1	-1/+0
2023-03-07	gdbstub: move register helpers into standalone include	Alex Bennée	3	-3/+3
2023-03-05	target/openrisc: Drop tcg_temp_free	Richard Henderson	1	-39/+0
2023-03-01	accel/tcg: Pass max_insn to gen_intermediate_code by pointer	Richard Henderson	1	-1/+1
2023-03-01	target/openrisc: Replace `tb_pc()` with `tb->pc`	Anton Johansson	1	-1/+3
2023-02-27	target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu	Philippe Mathieu-Daudé	1	-1/+2
2022-12-16	target/openrisc: Convert to 3-phase reset	Peter Maydell	2	-6/+10
2022-11-01	accel/tcg: Remove will_exit argument from cpu_restore_state	Richard Henderson	1	-2/+2
2022-11-01	target/openrisc: Use cpu_unwind_state_data for mfspr	Richard Henderson	1	-2/+9
2022-11-01	target/openrisc: Always exit after mtspr npc	Richard Henderson	1	-1/+1
2022-10-26	target/openrisc: Convert to tcg_ops restore_state_to_opc	Richard Henderson	2	-10/+13