riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-11-03	target/mips: Convert Loongson [D]DIVU.G opcodes to decodetree	Philippe Mathieu-Daudé	4	-37/+58
2024-11-03	target/mips: Convert Loongson DIV.G opcodes to decodetree	Philippe Mathieu-Daudé	4	-32/+24
2024-11-03	target/mips: Convert Loongson DDIV.G opcodes to decodetree	Philippe Mathieu-Daudé	6	-23/+126
2024-11-03	target/mips: Re-introduce OPC_ADDUH_QB_DSP and OPC_MUL_PH_DSP	Philippe Mathieu-Daudé	1	-13/+5
2024-11-03	target/mips: Simplify Loongson MULTU.G opcode	Philippe Mathieu-Daudé	1	-2/+0
2024-11-03	target/mips: Extract decode_64bit_enabled() helper	Philippe Mathieu-Daudé	2	-1/+8
2024-11-03	target/mips: Enable MSA ASE for mips32r6-generic	Aleksandar Markovic	1	-3/+5
2024-11-03	target/mips: Migrate TLB MemoryMapID register	Yongbok Kim	1	-2/+5
2024-10-15	hw/mips: Have mips_cpu_create_with_clock() take an endianness argument	Philippe Mathieu-Daudé	2	-2/+7
2024-10-15	target/mips: Expose MIPSCPU::is_big_endian property	Philippe Mathieu-Daudé	2	-4/+11
2024-10-15	target/mips: Use tcg_constant_tl() instead of tcg_gen_movi_tl()	Philippe Mathieu-Daudé	2	-101/+59
2024-10-15	target/mips: Use gen_op_addr_addi() when possible	Philippe Mathieu-Daudé	5	-26/+12
2024-10-15	target/mips: Have gen_addiupc() expand $pc during translation	Philippe Mathieu-Daudé	1	-6/+4
2024-10-15	target/mips: Replace MO_TE by mo_endian()	Philippe Mathieu-Daudé	6	-103/+106
2024-10-15	target/mips: Introduce mo_endian() helper	Philippe Mathieu-Daudé	1	-0/+5
2024-10-15	target/mips: Remove unused MEMOP_IDX() macro	Philippe Mathieu-Daudé	1	-8/+0
2024-10-15	target/mips: Rename unused sysemu argument of OP_LD_ATOMIC()	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/mips: Explode MO_TExx -> MO_TE \| MO_xx	Philippe Mathieu-Daudé	5	-98/+100
2024-10-15	target/mips: Factor mo_endian_rev() out of MXU code	Philippe Mathieu-Daudé	2	-4/+9
2024-10-15	target/mips: Convert mips16e decr_and_load/store() macros to functions	Philippe Mathieu-Daudé	1	-48/+53
2024-10-15	target/mips: Replace MO_TE by mo_endian_env() in get_pte()	Philippe Mathieu-Daudé	1	-1/+1
2024-10-15	target/mips: Introduce mo_endian_env() helper	Philippe Mathieu-Daudé	1	-0/+5
2024-10-15	target/mips: Rename cpu_is_bigendian() -> disas_is_bigendian()	Philippe Mathieu-Daudé	3	-6/+6
2024-10-15	target/mips: Declare mips_env_is_bigendian() in 'internal.h'	Philippe Mathieu-Daudé	2	-10/+10
2024-10-13	tcg: remove singlestep_enabled from DisasContextBase	Paolo Bonzini	1	-2/+3
2024-10-03	kvm: Allow kvm_arch_get/put_registers to accept Error**	Julia Suvorova	1	-2/+2
2024-09-20	license: Update deprecated SPDX tag LGPL-2.0+ to LGPL-2.0-or-later	Philippe Mathieu-Daudé	1	-1/+1
2024-08-20	target/mips: Load PTE as DATA	Philippe Mathieu-Daudé	1	-2/+2
2024-08-20	target/mips: Use correct MMU index in get_pte()	Philippe Mathieu-Daudé	1	-7/+12
2024-08-20	target/mips: Pass page table entry size as MemOp to get_pte()	Philippe Mathieu-Daudé	1	-31/+27
2024-07-22	target/mips: Restrict semihosting to TCG	Philippe Mathieu-Daudé	1	-1/+1
2024-07-22	target/mips: Add semihosting stub	Philippe Mathieu-Daudé	2	-2/+19
2024-07-11	target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation	Peter Maydell	1	-0/+1
2024-06-04	target/mips: Remove unused 'hw/misc/mips_itu.h' header	Philippe Mathieu-Daudé	1	-1/+0
2024-05-15	accel/tcg: Provide default implementation of disas_log	Richard Henderson	1	-9/+0
2024-05-06	accel/tcg: Access tcg_cflags with getter / setter	Philippe Mathieu-Daudé	2	-2/+2
2024-05-06	exec/cpu: Extract page-protection definitions to page-protection.h	Philippe Mathieu-Daudé	2	-0/+2
2024-04-26	target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'	Philippe Mathieu-Daudé	2	-2/+2
2024-04-25	hw, target: Add ResetType argument to hold and exit phase methods	Peter Maydell	1	-2/+2
2024-04-23	KVM: remove kvm_arch_cpu_check_are_resettable	Paolo Bonzini	1	-5/+0
2024-03-12	target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro	Philippe Mathieu-Daudé	9	-50/+24
2024-03-12	target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler	Philippe Mathieu-Daudé	1	-1/+1
2024-02-15	target/mips: Remove the unused DisasContext::saar field	Philippe Mathieu-Daudé	1	-1/+0
2024-02-15	target/mips: Remove CPUMIPSState::CP0_SAARI field	Philippe Mathieu-Daudé	2	-2/+1
2024-02-15	target/mips: Remove helpers accessing SAARI register	Philippe Mathieu-Daudé	3	-29/+0
2024-02-15	target/mips: Remove CPUMIPSState::CP0_SAAR[2] field	Philippe Mathieu-Daudé	2	-2/+1
2024-02-15	target/mips: Remove unused mips_def_t::SAARP field	Philippe Mathieu-Daudé	1	-1/+0
2024-02-15	target/mips: Remove CPUMIPSState::saarp field	Philippe Mathieu-Daudé	1	-1/+0
2024-02-15	target/mips: Remove MIPSITUState::itu field	Philippe Mathieu-Daudé	1	-1/+0
2024-02-15	target/mips: Remove helpers accessing SAAR registers	Philippe Mathieu-Daudé	3	-102/+0