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AgeCommit message (Expand)AuthorFilesLines
2023-07-25target/mips: Avoid shift by negative number in page_table_walk_refill()Peter Maydell1-15/+17
2023-07-25target/mips: Pass directory/leaf shift values to walk_directory()Philippe Mathieu-Daudé1-10/+8
2023-07-25target/mips/mxu: Avoid overrun in gen_mxu_q8adde()Philippe Mathieu-Daudé1-8/+18
2023-07-25target/mips/mxu: Avoid overrun in gen_mxu_S32SLT()Philippe Mathieu-Daudé1-2/+6
2023-07-25target/mips/mxu: Replace magic array size by its definitionPhilippe Mathieu-Daudé1-1/+1
2023-07-10target/mips: enable GINVx support for I6400 and I6500Marcin Nowakowski1-2/+2
2023-07-10target/mips/mxu: Add Q8SAD instructionSiarhei Volkau1-0/+45
2023-07-10target/mips/mxu: Add S32SFL instructionSiarhei Volkau1-0/+81
2023-07-10target/mips/mxu: Add Q8MADL instructionSiarhei Volkau1-0/+75
2023-07-10target/mips/mxu: Add Q16SCOP instructionSiarhei Volkau1-0/+85
2023-07-10target/mips/mxu: Add Q8MAC Q8MACSU instructionsSiarhei Volkau1-42/+86
2023-07-10target/mips/mxu: Add S32/D16/Q8- MOVZ/MOVN instructionsSiarhei Volkau1-0/+188
2023-07-10target/mips/mxu: Add D32/Q16- SLLV/SLRV/SARV instructionsSiarhei Volkau1-4/+162
2023-07-10target/mips/mxu: Add Q16SLL Q16SLR Q16SAR instructionsSiarhei Volkau1-0/+78
2023-07-10target/mips/mxu: Add D32SLL D32SLR D32SAR instructionsSiarhei Volkau1-0/+55
2023-07-10target/mips/mxu: Add D32SARL D32SARW instructionsSiarhei Volkau1-0/+59
2023-07-10target/mips/mxu: Add S32ALN S32LUI insnsSiarhei Volkau1-1/+121
2023-07-10target/mips/mxu: Add S32MUL S32MULU S32EXTR S32EXTRV insnsSiarhei Volkau1-4/+196
2023-07-10target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructionsSiarhei Volkau1-0/+117
2023-07-10target/mips/mxu: Add S8STD S8LDI S8SDI instructionsSiarhei Volkau1-2/+72
2023-07-10target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructionsSiarhei Volkau1-0/+200
2023-07-10target/mips/mxu: Add Q16ACC Q16ACCM D16ASUM instructionsSiarhei Volkau1-1/+227
2023-07-10target/mips/mxu: Add D32ADDC instructionSiarhei Volkau1-7/+32
2023-07-10target/mips/mxu: Add D32ACC D32ACCM D32ASUM instructionsSiarhei Volkau1-0/+160
2023-07-10target/mips/mxu: Add D32ADD instructionSiarhei Volkau1-0/+64
2023-07-10target/mips/mxu: Add Q16ADD instructionSiarhei Volkau1-0/+89
2023-07-10target/mips/mxu: Add S16MAD instructionSiarhei Volkau1-0/+65
2023-07-10target/mips/mxu: Add D16MADL instructionSiarhei Volkau1-0/+82
2023-07-10target/mips/mxu: Add D16MACF D16MACE instructionsSiarhei Volkau1-6/+68
2023-07-10target/mips/mxu: Add D16MULF D16MULE instructionsSiarhei Volkau1-5/+90
2023-07-10target/mips/mxu: Add S32CPS D16CPS Q8ABD Q16SAT insnsSiarhei Volkau1-3/+293
2023-07-10target/mips/mxu: Add Q8ADD instructionSiarhei Volkau1-0/+77
2023-07-10target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insnsSiarhei Volkau1-1/+243
2023-07-10target/mips/mxu: Fix D16MAX D16MIN Q8MAX Q8MIN instructionsSiarhei Volkau1-12/+18
2023-07-10target/mips/mxu: Add Q8SLT Q8SLTU instructionsSiarhei Volkau1-0/+65
2023-07-10target/mips/mxu: Add S32MADD/MADDU/MSUB/MSUBU instructionsSiarhei Volkau2-7/+105
2023-07-10target/mips/mxu: Add LXW LXB LXH LXBU LXHU instructionsSiarhei Volkau1-1/+82
2023-07-10target/mips: Add support of two XBurst CPUsSiarhei Volkau1-0/+46
2023-07-10target/mips: Add emulation of MXU instructions for 32-bit load/storeSiarhei Volkau1-23/+279
2023-07-10target/mips: Implement Loongson CSR instructionsJiaxun Yang14-0/+238
2023-07-10target/mips: Rework cp0_timer with clock APIJiaxun Yang3-20/+26
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson1-2/+2
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé3-4/+4
2023-06-05target/*: Add missing includes of exec/translation-block.hRichard Henderson1-0/+1
2023-06-05target/mips: Tidy helpers for translationRichard Henderson9-27/+8
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson1-19/+10
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson1-0/+5
2023-06-05tcg: Move TCGv, dup_const_tl definitions to tcg-op.hRichard Henderson1-0/+1
2023-05-11target/mips: Use MO_ALIGN instead of 0Richard Henderson1-1/+1
2023-05-11target/mips: Add missing default_tcg_memop_maskRichard Henderson4-28/+42