index
:
riscv-gnu-toolchain/qemu.git
block
master
stable-0.10
stable-0.11
stable-0.12
stable-0.13
stable-0.14
stable-0.15
stable-1.0
stable-1.1
stable-1.2
stable-1.3
stable-1.4
stable-1.5
stable-1.6
stable-1.7
stable-2.0
stable-2.1
stable-2.10
stable-2.11
stable-2.12
stable-2.2
stable-2.3
stable-2.4
stable-2.5
stable-2.6
stable-2.7
stable-2.8
stable-2.9
stable-3.0
stable-3.1
stable-4.0
stable-4.1
stable-4.2
stable-5.0
stable-6.0
stable-6.1
stable-7.2
stable-8.0
stable-8.1
stable-8.2
stable-9.0
staging
staging-7.2
staging-8.0
staging-8.1
staging-8.2
staging-9.0
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target
/
mips
Age
Commit message (
Expand
)
Author
Files
Lines
2021-05-02
target/mips: Extract load/store helpers to ldst_helper.c
Philippe Mathieu-Daudé
3
-259
/
+289
2021-05-02
target/mips: Merge do_translate_address into cpu_mips_translate_address
Philippe Mathieu-Daudé
3
-24
/
+9
2021-05-02
target/mips: Declare mips_env_set_pc() inlined in "internal.h"
Philippe Mathieu-Daudé
3
-20
/
+14
2021-05-02
target/mips: Turn printfpr() macro into a proper function
Philippe Mathieu-Daudé
1
-27
/
+23
2021-05-02
target/mips: Restrict mips_cpu_dump_state() to cpu.c
Philippe Mathieu-Daudé
3
-78
/
+77
2021-05-02
target/mips: Optimize CPU/FPU regnames[] arrays
Philippe Mathieu-Daudé
3
-4
/
+4
2021-05-02
target/mips: Make CPU/FPU regnames[] arrays global
Philippe Mathieu-Daudé
4
-14
/
+17
2021-05-02
target/mips: Move msa_reset() to new source file
Philippe Mathieu-Daudé
3
-36
/
+61
2021-05-02
target/mips: Move IEEE rounding mode array to new source file
Philippe Mathieu-Daudé
3
-8
/
+19
2021-05-02
target/mips: Simplify meson TCG rules
Philippe Mathieu-Daudé
1
-3
/
+2
2021-05-02
target/mips: Make check_cp0_enabled() return a boolean
Philippe Mathieu-Daudé
2
-2
/
+9
2021-05-02
target/mips: Migrate missing CPU fields
Philippe Mathieu-Daudé
1
-6
/
+15
2021-05-02
target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode
Philippe Mathieu-Daudé
1
-0
/
+1
2021-05-02
target/mips: Add missing CP0 check to nanoMIPS RDPGPR / WRPGPR opcodes
Philippe Mathieu-Daudé
1
-0
/
+2
2021-05-02
target/mips: Fix CACHEE opcode (CACHE using EVA addressing)
Philippe Mathieu-Daudé
1
-1
/
+3
2021-04-20
target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later)
Philippe Mathieu-Daudé
1
-5
/
+4
2021-04-13
target/mips: Fix TCG temporary leak in gen_cache_operation()
Philippe Mathieu-Daudé
1
-0
/
+2
2021-03-22
target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX
Peter Maydell
1
-4
/
+4
2021-03-13
target/mips/tx79: Salvage instructions description comment
Philippe Mathieu-Daudé
2
-160
/
+188
2021-03-13
target/mips: Remove 'C790 Multimedia Instructions' dead code
Philippe Mathieu-Daudé
1
-371
/
+0
2021-03-13
target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree
Philippe Mathieu-Daudé
3
-80
/
+48
2021-03-13
target/mips/tx79: Move PCPYH opcode to decodetree
Philippe Mathieu-Daudé
3
-39
/
+27
2021-03-13
target/mips/translate: Simplify PCPYH using deposit_i64()
Philippe Mathieu-Daudé
1
-30
/
+4
2021-03-13
target/mips/translate: Make gen_rdhwr() public
Philippe Mathieu-Daudé
2
-1
/
+3
2021-03-13
target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree
Philippe Mathieu-Daudé
3
-25
/
+17
2021-03-13
target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree
Philippe Mathieu-Daudé
6
-12
/
+94
2021-03-13
target/mips: Use gen_load_gpr[_hi]() when possible
Philippe Mathieu-Daudé
1
-23
/
+6
2021-03-13
target/mips: Extract MXU code to new mxu_translate.c file
Philippe Mathieu-Daudé
3
-1605
/
+1613
2021-03-13
target/mips: Introduce mxu_translate_init() helper
Philippe Mathieu-Daudé
2
-12
/
+17
2021-03-13
target/mips: Simplify decode_opc_mxu() ifdef'ry
Philippe Mathieu-Daudé
2
-4
/
+5
2021-03-13
target/mips: Convert decode_ase_mxu() to decodetree prototype
Philippe Mathieu-Daudé
1
-3
/
+5
2021-03-13
target/mips: Rename decode_opc_mxu() as decode_ase_mxu()
Philippe Mathieu-Daudé
1
-2
/
+2
2021-03-13
target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()
Philippe Mathieu-Daudé
1
-14
/
+5
2021-03-13
target/mips: Use OPC_MUL instead of OPC__MXU_MUL
Philippe Mathieu-Daudé
1
-2
/
+1
2021-03-13
target/mips: Pass instruction opcode to decode_opc_mxu()
Philippe Mathieu-Daudé
1
-7
/
+7
2021-03-13
target/mips: Remove unused CPUMIPSState* from MXU functions
Philippe Mathieu-Daudé
1
-10
/
+10
2021-03-13
target/mips: Remove XBurst Media eXtension Unit dead code
Philippe Mathieu-Daudé
1
-1286
/
+0
2021-03-13
target/mips: Rewrite complex ifdef'ry
Philippe Mathieu-Daudé
1
-4
/
+7
2021-03-13
target/mips/meson: Restrict mips-semi.c to TCG
Philippe Mathieu-Daudé
1
-1
/
+1
2021-03-13
target/mips/meson: Introduce mips_tcg source set
Philippe Mathieu-Daudé
1
-2
/
+5
2021-03-11
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul...
Peter Maydell
1
-2
/
+2
2021-03-11
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda...
Peter Maydell
3
-4
/
+4
2021-03-10
semihosting: Move include/hw/semihosting/ -> include/semihosting/
Philippe Mathieu-Daudé
3
-4
/
+4
2021-03-09
sysemu: Let VMChangeStateHandler take boolean 'running' argument
Philippe Mathieu-Daudé
1
-2
/
+2
2021-03-08
clock: Add ClockEvent parameter to callbacks
Peter Maydell
1
-1
/
+1
2021-02-21
target/mips: Use GPR move functions in gen_HILO1_tx79()
Philippe Mathieu-Daudé
1
-17
/
+4
2021-02-21
target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers
Philippe Mathieu-Daudé
2
-0
/
+22
2021-02-21
target/mips: Rename 128-bit upper halve GPR registers
Philippe Mathieu-Daudé
1
-1
/
+3
2021-02-21
target/mips: Promote 128-bit multimedia registers as global ones
Philippe Mathieu-Daudé
3
-27
/
+34
2021-02-21
target/mips: Make cpu_HI/LO registers public
Philippe Mathieu-Daudé
2
-1
/
+2
[prev]
[next]