riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-11-07	target: Move ArchCPUClass definition to 'cpu.h'	Philippe Mathieu-Daudé	2	-20/+17
2023-11-07	target/mips: Fix TX79 LQ/SQ opcodes	Philippe Mathieu-Daudé	1	-1/+1
2023-11-07	target/mips: Fix MSA BZ/BNZ opcodes displacement	Philippe Mathieu-Daudé	1	-2/+2
2023-11-07	target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'	Philippe Mathieu-Daudé	2	-2/+3
2023-11-07	target: Unify QOM style	Philippe Mathieu-Daudé	2	-4/+0
2023-10-19	hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h'	Philippe Mathieu-Daudé	2	-3/+1
2023-10-19	hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h'	Philippe Mathieu-Daudé	3	-3/+3
2023-10-07	meson: Rename target_softmmu_arch -> target_system_arch	Philippe Mathieu-Daudé	1	-1/+1
2023-10-07	semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user()	Philippe Mathieu-Daudé	1	-1/+1
2023-10-04	accel/tcg: Remove cpu_set_cpustate_pointers	Richard Henderson	1	-1/+0
2023-10-04	accel/tcg: Replace CPUState.env_ptr with cpu_env()	Richard Henderson	2	-4/+4
2023-10-03	tcg: Rename cpu_env to tcg_env	Richard Henderson	8	-774/+774
2023-10-03	accel/tcg: Move CPUNegativeOffsetState into CPUState	Richard Henderson	1	-2/+2
2023-10-03	target/*: Add instance_align to all cpu base classes	Richard Henderson	1	-0/+1
2023-10-02	Merge tag 'pull-shadow-2023-09-29' of https://repo.or.cz/qemu/armbru into sta...	Stefan Hajnoczi	3	-12/+10
2023-09-29	target/mips: Clean up local variable shadowing	Philippe Mathieu-Daudé	3	-12/+10
2023-09-28	accel/tcg: Always require can_do_io	Richard Henderson	1	-1/+0
2023-08-31	hw/mips: spelling fixes	Michael Tokarev	3	-10/+10
2023-08-31	target/mips: Remove unused headers in lcsr_helper.c	Philippe Mathieu-Daudé	1	-3/+0
2023-08-31	target/helpers: Remove unnecessary 'qemu/main-loop.h' header	Philippe Mathieu-Daudé	1	-1/+0
2023-08-31	target/helpers: Remove unnecessary 'exec/cpu_ldst.h' header	Philippe Mathieu-Daudé	2	-2/+0
2023-08-31	target/translate: Include missing 'exec/cpu_ldst.h' header	Philippe Mathieu-Daudé	2	-0/+2
2023-08-31	bulk: Do not declare function prototypes using 'extern' keyword	Philippe Mathieu-Daudé	1	-2/+2
2023-08-22	mips: Report an error when KVM_VM_MIPS_VZ is unavailable	Akihiko Odaki	1	-0/+1
2023-08-22	kvm: Introduce kvm_arch_get_default_type hook	Akihiko Odaki	2	-10/+1
2023-07-25	target/mips: Avoid shift by negative number in page_table_walk_refill()	Peter Maydell	1	-15/+17
2023-07-25	target/mips: Pass directory/leaf shift values to walk_directory()	Philippe Mathieu-Daudé	1	-10/+8
2023-07-25	target/mips/mxu: Avoid overrun in gen_mxu_q8adde()	Philippe Mathieu-Daudé	1	-8/+18
2023-07-25	target/mips/mxu: Avoid overrun in gen_mxu_S32SLT()	Philippe Mathieu-Daudé	1	-2/+6
2023-07-25	target/mips/mxu: Replace magic array size by its definition	Philippe Mathieu-Daudé	1	-1/+1
2023-07-10	target/mips: enable GINVx support for I6400 and I6500	Marcin Nowakowski	1	-2/+2
2023-07-10	target/mips/mxu: Add Q8SAD instruction	Siarhei Volkau	1	-0/+45
2023-07-10	target/mips/mxu: Add S32SFL instruction	Siarhei Volkau	1	-0/+81
2023-07-10	target/mips/mxu: Add Q8MADL instruction	Siarhei Volkau	1	-0/+75
2023-07-10	target/mips/mxu: Add Q16SCOP instruction	Siarhei Volkau	1	-0/+85
2023-07-10	target/mips/mxu: Add Q8MAC Q8MACSU instructions	Siarhei Volkau	1	-42/+86
2023-07-10	target/mips/mxu: Add S32/D16/Q8- MOVZ/MOVN instructions	Siarhei Volkau	1	-0/+188
2023-07-10	target/mips/mxu: Add D32/Q16- SLLV/SLRV/SARV instructions	Siarhei Volkau	1	-4/+162
2023-07-10	target/mips/mxu: Add Q16SLL Q16SLR Q16SAR instructions	Siarhei Volkau	1	-0/+78
2023-07-10	target/mips/mxu: Add D32SLL D32SLR D32SAR instructions	Siarhei Volkau	1	-0/+55
2023-07-10	target/mips/mxu: Add D32SARL D32SARW instructions	Siarhei Volkau	1	-0/+59
2023-07-10	target/mips/mxu: Add S32ALN S32LUI insns	Siarhei Volkau	1	-1/+121
2023-07-10	target/mips/mxu: Add S32MUL S32MULU S32EXTR S32EXTRV insns	Siarhei Volkau	1	-4/+196
2023-07-10	target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructions	Siarhei Volkau	1	-0/+117
2023-07-10	target/mips/mxu: Add S8STD S8LDI S8SDI instructions	Siarhei Volkau	1	-2/+72
2023-07-10	target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructions	Siarhei Volkau	1	-0/+200
2023-07-10	target/mips/mxu: Add Q16ACC Q16ACCM D16ASUM instructions	Siarhei Volkau	1	-1/+227
2023-07-10	target/mips/mxu: Add D32ADDC instruction	Siarhei Volkau	1	-7/+32
2023-07-10	target/mips/mxu: Add D32ACC D32ACCM D32ASUM instructions	Siarhei Volkau	1	-0/+160
2023-07-10	target/mips/mxu: Add D32ADD instruction	Siarhei Volkau	1	-0/+64